Depending on the product, technology, and process technology, the use of silicon-on-insulator (SoI) as a substrate can reduce the cost of ownership for chip making by up to 40 per cent.

That’s the conclusion of a new analysis by Semico Research which is contrary to the common wisdom about the costs associated with the use of SoI, a technology considered one of the best available today for making chips that offer high performance without the heat and power penalties that occur when using a standard substrate.

Indeed, cost has long been the objection of chip makers in evaluating whether or not to switch to silicon-on-insulator wafers.  Still, AMD and IBM have already made the switch for their high performance processors.  Intel continues to resist.

Semico’s analysis looked at the impact of SoI wafers on the cost of operation, the cost of manufacturing and the ultimate cost of the end product. 

“On a straight manufacturing cost basis, the 10 per cent to 15 per cent SoI cost-of-ownership (COO) figure does not tell the whole story,” said Joanne Itow, managing director of manufacturing at Semico. 

A cross-section through IBM's silicon-on-insulator process

“Moving further into the semiconductor manufacturing process, looking at the cost of SoI once the wafer is tested, diced and the good die packaged, the Semico analysis has found the SoI COO adds only four per cent to six per cent to the total manufacturing cost.”

Other factors further improving the benefits of SoI include new design solutions and logic architectures, according to Semico. 

While sometimes overlooked, the relationship between the performance of logic and the amount of on-die memory required in support of that logic has become a growing portion of the die area.

“Use of SoI-enabled memory optimisation tools can increase the benefits of SoI from breakeven to a cost reduction of over 40 per cent, depending on the product, technology and process complexity,” Itow said.