There have been only two 65nm designs in the world which have moved into volume manufacturing, according to the CTO of Synopsys, Dr Raul Camposano, speaking at the Globalpress Summit Conference in Monterey, yesterday.
"We have seen two 65nm designs in volume manufacturing, one is an Intel chip, the other is in Japan and hasn't been announced yet,” said Camposano.
The third design to go into volume production could be an FPGA from Xilinx. Xilinx has had first silicon if its 65nm Virtex FPGA and plans for an early shift into volume production.
"We will be on 15,000 wafers a month in a couple of months' time from two foundries," Sandeep Vij, vice-president of marketing at Xilinx, told EW. Xilinx's two foundries are UMC and Toshiba.
According to Camposano of Synopsys, Intel's yield curve on 65nm is good, with the improvement trend already less than two years behind 90nm.
Camposano also quoted AMD data indicating that it has seen an 80 per cent reduction in the time it takes to reach a mature lead over the last three technology generations.
In terms of tape-outs at 65nm, the activity is much greater than production activity. "There have been many 65nm tape-outs,” said Camposano, "we've seen 50 tape-outs on 65nm."
www.synopsys.com