Altera is moving directly to 28nm, by-passing the 32nm node, according to John Daane, CEO of Altera, speaking to the Globalpress Summit in San Francisco today.
"We're asking TSMC for their most aggressive process", said Daane, "at TSMC the half node processes are being made full node. 28nm will be available from TSMC at the same time as the IBM camp (the IBM Common Platform Alliance) come out with 32nm so we will have a half node leadership on the IBM camp at the same time."
Converting a half node process to full node involves giving all the support services to the half node process which are usually reserved for full node processes.
Currently Altera is running test chips on 28nm at TSMC and already has had some back. "We've already had 28nm test chips", said Daane, "we usually do 7-10 test chips to try out specific functions before putting them together."
Asked by Electronics Weekly when they would be put together, Daane declined to give a date, but said: "We launch end-product when the software is ready." Third party software is coming from Synopsys and Synplicity.
The programmable companies have a big process lead over ASIC where the standard process is still 130nm, according to Daane.
"We're now at the tipping point when PLDs can replace the entire ASIC market," said Daane. Currently PLDs are a $4bn market and ASICs a $24bn market.
However Daane predicted a collapse in ASIC revenues as consumer applications, from which 40 per cent of all ASIC revenues derive, take a big dive this year.
David Manners, San Francisco
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