Verilog is a hardware description language for hardware engineers to define digital circuitry, targeting CPLDs (complex programmable logic device) and FPGAs (Field-programmable gate arrays).
The Pascal-like, module-based language was created by Prahbu Goel and Phil Moorby at a company renamed to Gateway Design Automation, which was subsequently bought by Cadence Design Systems. As well as the capability for system-level modelling, the language supports timing controls.
Variants of the language include Verilog-95, Verilog-2001 and Verilog-2005 (named after versions of the IEEE Standard 1364-1995, 2001, etc. There is also SystemVerilog, which is a superset of Verilog-2005, also including extra design verification features.
Another hardware description language would be VHDL.
In the following, we bring together resources from Electronics Weekly to provide more detailed reference information about Verilog.
ELECTRONICS WEEKLY NEWS ON VERILOG
System Verilog language warning from IP expert
An industry expert has voiced concerns over System Verilog, the hardware description language touted as a replacement for VHDL and Verilog, describing it as "risky".
System Verilog needs full industry support
System Verilog may be moving the semiconductor design community closer toward a unified verification language, but still there needs to be greater support from tool vendors, says Warren Savage, president and CEO of IPextreme.
Xilinx offers faster FPGA design
Xilinx has updated its FPGA design software with a system that speeds up recompilation of designs. Making changes to a design’s VHDL or Verilog normally forces the whole design to be recompiled...
MathWorks generates synthesisable HDL code
The MathWorks has introduced a package which automatically generates synthesisable HDL (hardware description language) code from models generated in the firm’s Simulink and Stateflow software.
DAFCA launches on-chip debug tool suite
Electronic design automation start-up DAFCA has introduced production versions of test tools that aim to improve the debug of silicon samples. ClearBlue tools can be used with both VHDL and Verilog, while the tools will interoperate with some of the main EDA tool flows.
Cambridge tool converts Verilog description into C
A Cambridge firm has developed a tool that converts a Verilog description of hardware into C.
Verilog gets IEEE approval
Accellera, the organisation creating language standards for chip design, has said thelatest version of Verilog has been approved as a standard by the IEEE.
Verilog puts on pressure
Open Verilog International (OVI), the industry body tasked with protecting the interests of the Verilog digital hardware design language, is increasing the pressure on the opposing VHDL camp.
ELECTRONICS WEEKLY ANALYSIS ON VERILOG
Can UML-based design cut the mustard?
"With a tool like Altium Designer you have a very fluid environment to allow you to move between the different domains of board, FPGA and software, so even if you are using a high level tool you can still come down and represent that with scalable blocks that can be a transistor or 250,000 line of VHDL."
ELECTRONICS WEEKLY TRENDS & TECHNOLOGIES RELATED TO VERILOG
VHDL
Like Verilog, VHDL is a hardware description language for the design and implementation of circuits.
OTHER RESOURCES
A Verilog programming-language-interface primer (EDN)
http://www.edn.com/article/CA46145.html
Verilog (Wikipedia)
http://en.wikipedia.org/wiki/Verilog