The days of happy scaling are in danger, and the nano-scale hell
of physics is upon us, the MEDEA+ 2004 Forum was told by Professor
Hugo De Man, co-founder of IMEC.
“Leakage is a threatening enemy," stated De Man,
“Moore’s law for power goes the wrong way.”
The period from 1980 to 1995 was the era of happy scaling as
Asics proliferated. Then, between 1995 and 2003, there came the
‘great SOC euphoria’ when Asics evolved into flexible
platforms for domain specific embedded systems.
Now, asked De Man, ‘Is the era of happy scaling
over?’ The conclusion he came to was an unequivocal
‘Yes’ - unless radical things dramatically change.
With microprocessor power up at 100W to 150W, and doubling every
three years, the industry has to find new architectures.
“Von Neumann is a poor use of scaling – all the
energy is going on the communication between the processor and the
memory,” said De Man. “It’s much better to use 20
microprocessors running at 100MHz than one at 2GHz.”
The ‘threatening enemy’ of leakage has triggered a
law of diminishing returns where the oxides will have to be kept
larger than necessary.
"Leakage starts to dominate when we accept larger gate delays than
performance scaling predicts," he stated, adding, “when we go
to 45nm we will have to go to dual gate and fully depleted
SOI”.
The ‘hell of nano-scale physics’ is hitting the
industry at the same time as it is being hit by complexity issues.
“We’re entering on nano-scale scaling, but if we look
at design we’re into giga-complexity," said De Man.
The effects are already being seen in the commercial world.
“The systems houses are stopping building Asics – their
time is over – now it’s platforms, but the NRE for
platforms is $50,” said De Man, “30 per cent of the NRE
cost goes into software and this could go to two thirds.” He
complained: “Software moves up to the seventh heaven where I
can’t understand it myself.”
“The semiconductor and fabless companies have to be
specialists in a domain," added De Man, “they have to seek
alliances with the systems guys.”
The problem for companies wanting to develop platform products
is: “A lack of tool support at the platform level,” he
said, adding “there’s no money in developing EDA tools
any more – so who will do it?”
The answer to the process technology/design complexity crises,
reckoned de Man, is a drastic one: “We need to lock up the
hardware designers and energy-aware software designers with
nano-scale aware architects and CMOS scalers under one roof and
take time to talk to each other!”
The effect of this may be that fully integrated manufacturers
– those semiconductor companies with their own fabs - may
benefit at the expense of companies operating under the
fabless/foundry model.
“IDMs have an advantage because they have all the people
under one roof," concluded de Man, “even if they don’t
talk to each other!”
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