Read our ISSCC 2008 coverage of the San Francisco conference
Held once a year in San Francisco, the IEEE International Solid-State Circuits Conference (ISSCC) is the world's show case for the best in circuit design for integrated circuits. Here, we highlight some news in brief:
- QUAD BAND GSM PHONE ON 24MM2 DIGITAL CMOS CHIP
- 10-BIT 1MSAMPLE/S ADC OPERATES AT 1.9µW
- SANDISK AND TOSHIBA SHOW 3BIT/CELL NAND FLASH
QUAD BAND GSM PHONE ON 24MM2 DIGITAL CMOS CHIP
Texas Instruments revealed details of a quad-band GSM phone, including RF and baseband (BB), on a single 24mm2 90nm pure digital CMOS chip. Infineon has done something similar, describing its six metal 0.13µm CMOS RF/BB mounted alongside a 0.25µm CMOS power chip in a system-in-package. Also in digital CMOS, Broadcom showed a 0.13µm quad-band GPRS/EDGE radio.
10-BIT 1MSAMPLE/S ADC OPERATES AT 1.9µW
The University of Twente in the Netherlands announced an ultra-low power 10-bit 1Msample/s ADC - operating at 1.9µW - or 4.4fJ/conversion step. Low losses are achieved using a successive approximation topology with a charge redistribution DAC, a dynamic two-stage comparator, and a delay line based controller made from CMOS. The chip was made in 65nm CMOS and operated at 1.0V. 4.9Msample/s can be achieved at 1.3V.
SANDISK AND TOSHIBA SHOW 3BIT/CELL NAND FLASH
SanDisk and Toshiba disclosed details of a 56nm 16Gbit 3bit/cell NAND flash. On a 142.5mm2 chip 0.0075µm2/bit is achieved. Saifun Semiconductors' ISSCC flash was 4bit/cell 8Gbit NROM on a 155mm2 die, offering 0.009µm2 equivalent bits.