Ireland-based IC Mask Design is offering a range of training courses on IC layout aimed at all levels of expertise which focus on the development of physical design skills.
The ‘Master-IC’ courses, which are independent of any EDA tool environment, are run by a dedicated training division of the company and cover the complete spectrum of IC layout.
“Our comprehensive range of flexible courses will provide a complete physical design training solution for customers’ specific requirements,” said Fergal Brosnan, CEO of IC Mask Design.
The courses are offered at the firm’s headquarters in Limerick, but Brosnan believes the training division enables “a global offering of our training programmes”.
The ‘Layout Basics’ module introduces the knowledge and skills required to complete the full custom layout of a CMOS design, including the floor planning, implementation and physical verification stages.
‘Custom Digital Layout Techniques’ focuses on methods used in the physical design of standard cells and full custom digital blocks. It starts with the layout of basic MOS transistors and then develops to cover more advanced techniques used in creating area-efficient full custom digital layouts.
An introduction to full custom analogue layout is provided by ‘Analogue Layout Techniques’. This focuses primarily on mixed mode CMOS processes, teaching the techniques used in producing high quality layouts of baseband analogue designs.
For those that want to build on this, the ‘Analogue Layout, Advanced Techniques’ course aims to develop skills further, covering the techniques necessary to produce high quality, well matched and noise tolerant layouts of designs on CMOS and BiCMOS processes.
‘RF Physical Design’ has a primary focus on CMOS processes and is targeted towards developing the skills necessary to complete the layout of an RF design.
The ‘Standard Cell Place and Route’ course is for both front-end digital designers and physical designers. It introduces the complete digital design flow from RTL through to GDSII, before focusing on the primary design steps involved in the back-end flow.
‘Timing Closure In The Backend Flow’ seeks to develop the skills of place and route engineers by introducing the concepts behind timing analysis and timing closure. The focus is on the common methodologies used to fix all timing violations during the layout process.
www.icmaskdesign.com