Today Tensilica is making available the reference architecture components for its baseband PHY for LTE, HSPA+ and WiMAX.
All the programmable DPUs (dataplane processing units) of Tensilica’s Atlas Reference Architecture are now available for customer evaluation.
The architecture uses the Tensilica ConnX BBE16 baseband DSP core coupled with three function-specific data plane processor cores (DPUs) to allow the baseband PHY (physical layer) SOC (system-on-chip) developer to create a low power and small PHY system, while retaining the flexibility of a fully programmable radio, which is vital for competitive multi-standard user equipment devices (handsets) and femtocells.
Atlas supports the 3GPP (3rd Generation Partnership Project) LTE standard, as well as other complementary standards such as HSPA+ and WiMAX.
“By completing our offering with these additional data plane processors, we can help other LTE and HSPA+ chipset suppliers achieve a faster time-to-market,” “says Tensilica’s Eric Dewannain.
The ConnX BBE16 is the single DSP part of the Atlas reference architecture, as it is built around a core vector pipeline made of sixteen 18bx18b MACs (multiply accumulators).
It is optimised for performance of DSP kernel operations such as FFT and FIR as well as matrix multiplies. This DSP core is optimised to give strong performance per power and area.
There are several other functions that must be implemented for a fully functional PHY system, and these are better implemented in function-specific DPUs to offer lower power and smaller size and address the control functions required. The three other Atlas components are: The ConnX Soft Stream Processor (ConnX SSP16), the ConnX Bit Stream Processor (ConnX BSP3) and the ConnX Turbo Decoder (ConnX Turbo16).