MIPS Technologies has introduced a multi-threaded processor.
“Compared with the 24k and all other things being equal, it offers a 60 per cent performance gain running two threads at the cost of 14 per cent extra die area which equated to 14 per cent extra power consumption,” Vivek Sardana, product marketing manager for the device told Electronics Weekly.
Called the MIPS32 34k, the core can run up to five threads. “The beauty of this is the application doesn’t need to change at all,” said Sardana. Only the operating system needs to know.
When running only a single thread, the 34k effectively becomes a 32k.
Five sets of registers, which account for most of the extra chip area, store the state of the core for each thread and allow threads to be switched cycle-by-cycle, and one of these can be the interrupt service routine.
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Two virtual processors share up to five threads in the 34k core
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Resources are allocated to threads by a block called QoS. “You can guarantee a VoIP thread will hit real time even if a non-real-time operating system turns off interrupts or is doing a very intensive thread,” MIPS’ engineering director Darren Jones told EW.
So flexible is the QoS block that “it is hard to imagine something you couldn’t do in it”, he said.
Two QoS-controlled ‘virtual processing elements’ (VPEs) share the instruction pipeline and sit over the real execution elements allowing two separate operating systems to share between two and five tasks.
On a 90nm process, the fully synthesisable core should run at above 500MHz, said Sardana.
www.mips.com