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For more on microprocessor, MCU, and digital signal processor (DSP) content, see Design/Micros-DSPs

Intel, AMD detail 32nm high-k metal gate MPUs at ISSCC

Steve Bush
Monday 08 February 2010 09:54

Intel and AMD will present details of their 32nm high-k metal gate x86 microprocessors at the IEEE's International Solid-State Circuit Conference (ISSCC), which opens this week in San Francisco.

Intel's six-core Westmere family has 1.17 billion transistors and a 12Mbyte shared L3 cache. It runs faster than the firm's four-core 45nm Nehalem while using the same power.

AMD's x86-64 processor core exploits the isolated power islands possible in SOI to offer controllable power dissipation from 2.5 to 25W. 8T L1 cache cells allow low minimum voltage operation.

See also: The x86 Processor Endgame blog

Intel is also showing a 45nm "green" transceiver chip that delivers 47 channels of 10Gbit/s at 1.4mW/Gbit/s - claimed to be a mere 10% of previously reported specific power consumption. The urge to push analogue circuits onto CMOS seems un-stoppable with, for example, Delft University producing a chopper-stabilised instrumentation amplifier with 2µV offset and 21nV/√Hz noise.

A multi-path current-feedback architecture achieves 39µV ripple with 143µA current from a 5V supply, without a response notch at the chopper frequency.

Texas Instruments, India, has a paper on a 0.5W Class-D speaker driver using 45nm CMOS that achieves 79% peak efficiency and 100dB SNR.

Delft University also features among the lateral thinking papers, with a frequency reference based not on the electrical properties of silicon, but its thermal properties.

The CMOS thermal-diffusivity reference is +/-0.1% accurate and has temperature coefficient of +/-11.2ppm/°C from -55 to 125°C. Untrimmed, the accuracy is still 0.2%.

 

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