ARM has issued the new specification for its on-chip interconnection bus, known as AMBA, which moves it closer to FPGA integration.
This 4th generation of the AMBA bus is note-worthy because it defines an expanded family of AXI interconnect protocols including AXI4, AXI4-Lite and AXI4-Stream.
The AXI4 protocol has been redesigned to make it compatible with embedded FPGA design. It adds support for longer bursts which will support devices with large block transfers.
There is also quality of service (QoS) signalling to manage latency and bandwidth in complex multi-master systems.
Significantly, this will support the use of the AMBA bus in FPGAs.
“The AMBA 4 specification will take embedded system design to performance and efficiency levels considered the exclusive domain of desktop, laptop and network equipment,” said Keith Clarke, v-p and general manager of fabric IP processor division at ARM.
This latest version of the AMBA bus is the result of a joint development with FPGA supplier Xilinx.
With Xilinx looking to embed ARM processors in its FPGAs supported by the new bus.
“We have worked closely with ARM on the definition, development and review of the AMBA 4 AXI4-Lite and AXI4-Stream specifications,” said Vin Ratford, senior v-p worldwide marketing and business development at Xilinx.
See: Xilinx brings ARM Cortex and AMBA to its FPGAs
AXI4-Lite is a subset of the full AXI4 specification for simple control register interfaces, reducing SoC wiring congestion and simplifying implementation.
The AXI4-Stream protocol provides a streaming interface for non-address-based, point-to-point communication, such as video and audio data.
Announcements regarding phase two of the new AMBA 4 specification will be issued later in 2010.
The AMBA 4 phase one specifications including AXI4, AXI4-Lite and AXI4-Stream can be downloaded today from http://www.amba.com
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