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For more on microprocessor, MCU, and digital signal processor (DSP) content, see Design/Micros-DSPs

TI targets four core DSP at SDR

Richard Wilson
Tuesday 08 November 2011 00:05

Texas Instruments is offering multicore digital signal processors (DSPs) based on its TMS320C66x processor.

The main target is processing intensive applications such as software defined radio, radar, surveillance and imaging cameras.

"The KeyStone multicore architecture allows developers to use the same platform, across TI’s C66x multicore DSPs, for supporting multiple and complex waveforms in SDRs," said TI.

The C66x multicore device is a 10GHz DSP with fixed- and floating-point performance on a single device for increased precision, a key requirement for mission critical systems.

TI’s C66x DSP generation includes the TMS320C6670 radio SoC, a 1.2GHz four core device, boasting improved accelerators for software defined radios (SDRs), public safety and emerging broadband radio systems.

The C6670 includes a multistandard Bit Rate Coprocessor (BCP) as well as other coprocessors that accelerate physical layer processing for LTE, WCDMA, TD-SCDMA and WiMAX, substantially increasing system capacity and performance with low latency.

There are configurable accelerators for software defined radio with a "simplified programming model", said TI. 

For radar systems the C66x multicore DSPs provide a path for parallel processing in order to meet the FFT processing time requirements. Radar developers can choose to use all of the cores or some of the cores to meet FFT time repose requirements.

Once FFT performance is met within a radar system, developers can use the other C66x DSP cores to perform pre and/or post processing of the signals or other tasks in the system. 

www.ti.com

 

 

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