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For more on memory, NAND, DRAM, SRAM and DDR content, see Components/Memory

Toshiba adds error correction to SLC NAND flash chips

Richard Wilson
Monday 09 January 2012 00:01

Toshiba Electronics has developed a single level cell (SLC) NAND flash memory with an embedded error correction code (ECC).

Dubbed, BENAND, it is intended for applications in LCD TVs and digital cameras and is sampling in two capacities - 4Gigabit and 8Gigabit.

Mass production will follow from March 2012.
 
With SLC NAND memory chips, ECC has typically been embedded in the host processor and corrected 1 bit per 512 bytes.

"However, advances in memory process technology require enhanced error correction; more than 4 bit correction per 512 bytes for NAND flash fabricated with a 32nm process," said Toshiba. 

"For NAND flash memory without ECC fabricated with 32nm and beyond, the controller in the host processor must be changed to secure the required level of correction," said Toshiba.
 
Toshiba says the new devices remove the burden of ECC from the host processor while minimising protocol changes.

BENAND embeds an ECC with an error correction of 4 bit per 512 bytes onto Toshiba’s cutting edge 32nm process SLC NAND flash memory. Package and pin configuration compatibility are assured with general SLC NAND flash, allowing easy replacement of existing products.
 
Toshiba plans to expand the BENAND lineup to include 24nm process NAND flash memory products after summer 2012.
 
www.toshiba-components.com


 

 

 

 

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