In a perfect world the design process operates in a smoothly linear fashion from architecting the system to detailed design to board layout to testing to pre-production to full production.
The world rarely matches this Utopian ideal. In the real world the requirements of a design may not be fully known for several reasons. The engineer’s customer may have a change of mind regarding what they want halfway through the design process.
Alternatively, after the design is architected, several key functions may have been inadvertently missed out, or additional requirements may become clearer as the design process continues. This can significantly throw out timescales and impact deadlines.
This is particularly unfortunate for the mass of 8-bit microcontroller (MCU) users today. This key component arrives with a set of fixed-function peripherals and I/Os. When the design specification for a product changes (often at the behest of the end customer), an 8-bit MCU cannot change peripherals of I/Os in response.
For the design engineering community, this causes a huge amount of disruption: evaluation and selection of a replacement MCU, board re-layout and production retooling.
Of course, an experienced engineer who has seen such problems in the past will take precautionary measures to guard against their effects in the future. These measures often have flaws associated with them, however.
One tactic is to provide some spare board space for external passives. Often a design can be made more robust by the late addition of simple filtration, for example, which might not be thought to be required at the start of a design. Also, board space can be made available for the termination of high-speed digital signals.
Another strategy is to pair the 8-bit MCU with a companion CPLD. However, this will, in some cases, use up too much floor space or be impossible to accommodate in the intended form factor. Additionally, vias and other routing may need to be added – this can increase noise and unwanted effects such as inductance.
In fact, leaving board space in reserve, and using a companion CPLD, are both workarounds – they do not address the root cause of the problem, which is that the MCU’s peripheral functions and pinouts are fixed. But what if the root cause can be addressed?
We at Cypress Semiconductor propose that the PSoC (Programmable System-on-Chip) mixed-signal array can offer a flexible approach to the problem.
In the above example of the architecture phase of the design (see Figure 1), five functions are required: analogue-to-digital converter (ADC), MCU, pulse-width modulator (PWM), LCD display and I2C interface.
In traditional 8-bit MCUs, analogue and digital functions are hardwired into the device, and cannot be changed. In a programmable device, analogue and digital functions, or ‘user modules’, are contained in a library of pre-characterised functions controlled by a set of registers.
These registers reside within the memory map of the PSoC’s Harvard-architecture M8C MCU. The process of defining the floor plan of the design ultimately produces a register table in flash memory, which is copied to the registers during the boot process. This configures the device for the required functions.
Because it is programmable in this way the registers can be changed, and different functions created, at any time.
In one example, the ADC can be replaced by a comparator at the schematic creation stage. A change of analogue control register settings allows the designer to reconfigure the device to remove the ADC and add a comparator. Later on, a UART and an SPI interface can be added.
Finally, in the production part of the design, the comparator is removed and a low-pass filter and ADC are added.
David Hoskins is European field applications engineering manager at Cypress Semiconductor