ARM is claiming potential power savings of up to 40% using a silicon-on-insulator (SOI) 45nm test chip.
The SOI process, an alternative to the traditional bulk CMOS process used to fab ARM-based processors, was demonstrated on a test chip was based on an ARM 1176 processor.
According to ARM, the demonstration shows that SOI technology is a "viable alternative to traditional bulk process technology when designing low-power processors".
The test chip demonstrated 20% higher operating frequency capability over bulk while saving 30% in total power in specific test applications, said ARM.
It is likely that a number of processor firms will be watching the results of the ARM/Soitec demonstration closely as they consider the potential of SOI process technology.
According to Horacio Mendez, executive director of the SOI Industry Consortium. “Many companies will benefit from this data in considering their technology manufacturing decision.”
ARM worked with French SOI wafer specialist Soitec on the test chip, which compared the 45nm SOI technology with bulk CMOS 45nm low-power (LP) technology.
One issue could be the higher cost of processing SOI devices compared with the more commonly used bulk CMOS, but it is predicted that wider implementation of SOI will inevitably lower production costs.
"It simplifies the overall CMOS architecture, thus reducing the cost of ownership below a bulk approach," stated Paul Boudre, Chief Operating Officer of the Soitec Group.
See: Soitec readies low power SOI process for 22nm
“Investing the resources to conduct a bulk vs. SOI comparison provides useful data to address previously speculated claims and demonstrates that there can be performance and power savings benefits from SOI,” said Tom Lantzsch, v-p physical IP division, ARM.
There was also a 7% reduction in die area compared to bulk CMOS low-power technology, operating at the same speed.
The design was implemented using ARM and IBM standard SOI libraries and leading EDA tools. The IP ecosystem and manufacturing solutions are in place for design starts with ARM and IBM libraries on IBM 45nm SOI technology.