LSI Logic is bidding to match the short design cycles typically
achieved with FPGAs with its low cost platform Asic products.
Compared with the design cycle for full custom Asics of a year
or more, the firm claims to turn a platform Asic design around in
under three months.
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| Corrigan: Ten weeks is the target |
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"Ten weeks is the target, the same as with FPGAs, and we are about
there," Wilf Corrigan, CEO of LSI Logic told
Electronics
Weekly.
Altera quotes under ten weeks for first structured Asic
prototypes.
Corrigan believes that the firm's platform Asic family known as
RapidChip has changed its Asic business as design starts for full
custom devices decline and process technology pushes up costs and
design cycles.
"We are at the crossover point and by the middle of the year the
RapidChip business will be bigger than full custom," said
Corrigan.
This view of the Asic market is more aggressive than that of
other firms. Gary Meyers of software tool firm Synplicity has told
EW that within five years the number of standard cell Asic
design starts will drop below 1,000 per year. Also in that
timeframe, the number of structured Asics will break 1,000, he
claimed.
Paul Hollingworth at FPGA firm Altera, which has its own
structured Asic product, estimated that for an "Asic market of
$20bn or so, a third to a half of that is ripe for structured
Asic".
According to Corrigan, the high cost of Asic development on 90nm
processes will push the full custom market to just a handful of
designs a year. "At the 90nm node the question is how many full
custom designs, at 65nm there will be very few, if any," said
Corrigan.
www.lsilogic.com