Start-up Achronix wants to take FPGAs into the performance territory of Asics with a design which it claimed is four times faster than conventional FPGAs.
“You can’t compete with Xilinx and Altera with an incremental performance increase, with something that’s 20 per cent faster or 30 per cent cheaper,” Yousef Khalilollahi, v-p of marketing at Achronix, told EW. “Our test silicon on 90nm runs at 2GHz.”
Typically high performance FPGAs are clocked at 550MHz.
On the tools side, the Achronix strategy is to stick, as far as possible, to commercial tools. “Our plan is to have a very familiar architecture. People want to plug into the existing tools,” said Khalilollahi.
For synthesis, Khalilollahi reckons there is enough commercially available third party software.
“For place and route, the tools have to come from us,” said Khalilollahi, “we need put that in the hands of customers. Having a familiar architecture allows you to buy existing place and route tools, and modify them to fit the architecture, so long as the architecture is not so much out of whack with existing architectures.”
Getting IP for the Achronix cores will not be a problem because Asic IP will fit, said Khalilollahi.
“IP vendors have to modify Asic IP for current FPGAs because current FPGA performance is so much worse than Asic performance,” said Khalilollahi, “but our performance meets and exceeds Asic performance, so we don’t burden them with the need to modify their IP. You just plug in the Asic RTL code.”
The firm is one of a raft of recent FPGA start-ups. Others are: MathStar, which has a product it calls FPOA (field programmable object arrays) running at up to 1GHz; C-Switch which is targeting telecoms applications and Velogix, which is also targeting high performance FPGAs.