A two-year old spin-out from Stanford University believes it can solve one of the key problems of parallel processors - the difficulty of programming them.
Stream Processors has an architecture which can be programmed in C/C++ and which looks, to the programmer, as if it is a single core architecture.
“To the programmer it looks like a single core approach. It doesn’t require the programmer to think in terms other than as a single core,” Bengt Christensson, vice-president for business development at Stream Processors, told EW. “The programmer doesn’t have to worry about partitioning across multiple cores.”
Stream uses a VLIW architecture chip with 80 ALUs organised into 16-lane data-parallel unit with 5ALUs per lane. Each lane runs at 800MHz. The chip achieves peak performance of 512 8-bit or 265 16-bit giga operations per second with a power efficiency of 0.82mW/MMACs.
The company has been shipping its first chips, called Storm-1, since December into video and image processing applications. They are made on TSMC’s 130nm process. “Our customers are doing pilot runs, and will be going into full production this year,” said Christensson.
Stream’s tools include a development kit, fast functional debugger library, and target code simulator
The company has 70 employees and VC backing from Austin Ventures, Norwest Venture Partners and Woodside Fund.