PMC-Sierra has come up with a two-chip answer to the backhaul on mobile basestations which increases bandwidth by 4x and, in some cases, halves the IC cost.
The chip-set comprises a 40nm anti-fuse based FPGA programmed by PMC-Sierra, and a PMC programmable network processor.
Together they allow wireless base-stations to transition from OC12 to OC48.
There are two versions of the FPGA-based chip, generically called UFE4, which are designated UFE412 and UFE448. 412 is sampling now; 448 will sample in the second half.
The UFE4 chips work with PMC’s WinPath3 network processors.
Pricing has not been disclosed but the chip-sets are sampling now. “In some cases they are half the cost of the previous generation,” Fabian Trumper, product manager for wireless infrastructure networking at PMC-Sierra, told EW.
The flexibility of the chip-set allows it to be applied to very wide range of applications.
It supports: TDM, ATM, Frame Relay, HDLC, PPP and Circuit Emulation.
The UFE4 integrates a SONET/SDH Framer/Mapper, as well as an advanced Protocol Pre-Processing Core for PWE3 services for SONET/SDH networks.
The UFE4 supports all protocols on both channelised and non-channelised interfaces, enabling an Any-Service, Any-Port platform.
Together with WinPath3, this platform supports a variety of protocol
interworking services including CES over PSN, ATM over PSN, PPP/ML-PPP, HDLC, IP and Ethernet interworking and many others.
Asked if UFE4 was implemented on a Quicklogic CSSP, Trumper declined to comment.