Boundary scan continues to extend its influence in the testing of board-based systems as users realise it can be implemented within existing test environments, says supplier Goepel Electronics.
“What has changed is the message that boundary scan can complement and not necessarily compete with existing in-circuit test (ICT) equipment,” said Karl Miles, sales manager at Goepel Electronics, who was speaking during the company’s technology seminar day for UK-based engineers at Duxford Air Museum last week.
“With systems incorporating embedded processors and FPGAs there is clear potential for boundary scan,” said Miles.
“And there is now an awareness that it can be implemented as part of existing test functions,” said Miles.
The technology day included presentations from test suppliers such as National Instruments, Aeroflex and Teradyne describing how boundary scan could be used as part of wider test systems.
Goepel described the example of using boundary scan to programme FPGAs and Asics in parallel within a Teradyne test set-up which resulted in a reduction in programming time.
Nigel Adams from Aeroflex described a way of using boundary scan in a typical ICT set-up.
The additional functionality was added using PXI or PCI controller cards.
The technology day was one of three which Goepel is running this year in the UK.
Goepel has recently introduced a boundary scan controller in its Scanbooster product line, which is compliant with the PCI bus specification.
The controller supports JTAG/boundary scan tests, VarioTAP emulation tests, in-system programming (ISP) for PLD and FPGA, as well as in-system programming for flash serial EEPROM devices.
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