The University of Michigan has squeezed a solar cell, rechargeable battery, and CPU-based data acquisition system into 9mm³ (2.5x3.5x1mm).
The node processor, a 32bit ARM Cortex-M3 processor operated just above its threshold voltage, consumes just 100pW with pointers retained in its deepest sleep, suggesting the node could idle for 49 years on its 12µAh 2.9mm³ rechargeable thick-film Cymbet battery with no solar intervention.
Charging power comes from two 1mm² solar cells, made on 0.18µm CMOS process.
"Our system can run nearly perpetually if periodically exposed to reasonable lighting conditions, even indoors," said Professor David Blaauw. "Its only limiting factor is battery wear-out, but the battery would last many years."
Presented at ISSCC last week, the sensor spends most of its time in sleep mode, waking briefly every few minutes to take measurements.
A 9mm3 solar-powered sensor node that, without light, could stand-by for 49 years on its internal battery.
In normal operation, its total average power consumption is said to be less than 1nW, made up of 550pW sleep punctuated by bursts of 7.7µW activity.
Sampling consists of taking two measurements, one of temperature and one from a capacitive sensor. In bright sunlight, around 15,000 samples per day can be taken.
At 0.4V the processor is clocked at 73kHz, which can be increased to 1MHz by turning up the voltage to 0.5V.
There is 16kbit of non-retentive SRAM for computation alongside a custom-designed 24kbit retentive SRAM for long-term data storage where leakage has been cut to 3.3fW/bit at 0.4V.
Extensive use of power gating is made to keep power down, arbitrated by the CPU's wake-up controller and sleep-state module which are the only two blocks that are never shut down.
The heart of the node is a switched capacitor power converter which flips between active, sleep, and harvest modes to transfers charge between solar cells, battery, and CPU.
In active mode the converter runs at 1.2MHz and divides the battery voltage by six.
For consistent operation over temperature, this intermediate rail is smoothed by a linear regulator (30nA tail current plus 8nA reference) to feed the CPU.
In sleep, the linear regulator is turned off and the converter runs at 50Hz to support the two permanently-on blocks and the retentive SRAM.
When there is spare power from the solar cells, this is diverted to charge the battery by the same switched capacitor block.