Researchers at Cornell University have made a 20nW power source using micromachining and a radio-isotope with a half-life of 100 years.
Power extraction efficiency is claimed to be 30 per cent. “This is ten times more efficient than previously reported results from the same group,” said the IEEE, whose ISSCC 2006 conference has been chosen to reveal details of the device.
“Measurements show that the energy source can provide up to 40µW of peak power for burst-mode computation and communication,” said the IEEE.
This is around 1µW of peak power per milliCurie of beta-emitter Nickel-63, said the team.
Held annually in early February, ISSCC (International Solid-State Circuits Conference) is probably the world’s top chip design conference.
Announced this year amongst hundreds of analogue, digital, transducer and imaging designs; Sony will unveil an ultra-wideband transceiver chip that supports distributed control of up to 64 terminals in an ad-hoc self-configuring network.
“Its direct sequence spread spectrum technique delivers sufficient bandwidth to handle today’s heavy multimedia and data traffic,” said the IEEE.
CMOS 65nm processors also feature. “These announcements, occurring only two years after corresponding 90nm announcements, indicate that the trend is still being maintained,” said the IEEE.
Two papers describe 9GHz processing elements. “Circuit architectural enhancements such as greater pipeline depth, split-word lines, improved logic design lead to greater than 30 per cent improvements in speed performance,” said the organisation.
“Power management at both the system and circuit levels substantially improve leakage current, with very little impact on speed performance.”
ISSCC 2006 is on February 5-9 at the San Francisco Marriott Hotel.
www.isscc.org