Nvidia, which pays for its chips by the wafer, has blamed low yields on 28nm for a decline in profit margins.
"The gross margin decline is contributed almost entirely to the yields of 28nm being lower than expected," says Jen-Hsun Huang, CEO of Nvidia.
Because Nvidia has a wafer-based pricing arrangement with TSMC, the fewer die per wafer, the higher the die cost.
Last month at IFS2012, Mike Bryant, CTO of Future Horizons, said there were yield problems on TSMC’s 28nm process.
All that TSMC would say in reply was that the28nm ramp was 3x faster, and defect density issues 3x better, than the 40nm ramp at the same stage. However 40nm was a notoriously difficult node.
Xilinx recently said it is having the fastest new-node product roll-out in its history having shipped four of its five 28nm product families in 11 months. That is half the time it took to roll out initial devices in two product families at 40nm.
It has been pointed out that Nvidia usually makes very large die, which are more liable to defect density issues, which could account for the different experiences of Xilinx and Nvidia.
Also Xilinx uses the HPL version of TSMC's 28nm process while Nvidia is using the HP version