TSMC has said it is in volume production with its 40nm process for both its general purpose (G) and low power (LP) versions.
First customers for the 40nm process technology include AMD, Altera and Nvidia.
The general purpose G version is intended for CPUs, FPGAs and graphic processors, while the low power LP process targets mobile processors and devices.
"We view 40nm as an important process node for the cost-effective development of graphics chips and other devices, especially in 2009," said Rick Bergman, senior v-p & general manager in the AMD Graphics Products Group.
TSMC’s 40G and 40LP processes passed process qualification, reaching “first wafers out” status and completed product qualification in October when first customer wafers entered production.
The process has the potential to offer up to a 2.35 times raw gate density improvement over the 65nm node. The 40G process is up to 30% faster than TSMC’s 65nm GP process at the same leakage, or up to 70% lower leakage at the same speed.
It also provides up to 45% lower active power than the 65GP process. The 40LP process provides up to 46% lower leakage and up to 50% lower active power than TSMC’s 65LP at the same speed.
It also features the smallest SRAM cell size, 0.242um2, and macro size in production today.