Achronix Semiconductor's Speedster 1.5GHz FPGA is in commercial production at TSMC through manufacturing services company, eSilicon.
The first member of the Speedster family, the SPD60, is currently in production on TSMC’s 65nm G-Plus process technology.
“We selected eSilicon for their expertise in backend implementation, manufacturing and packaging,” said Ravi Sunkavali, vice president of Hardware Engineering at Achronix
“Working with the knowledgeable engineers at Achronix and with TSMC as our fab partner, we produced working first-pass silicon for this highly complex device,” said Hugh Durdan, COO at eSilicon. “The production yields are excellent for a device of this complexity.”
Achronix FPGAs derive their high speed performance from a patented picoPIPE acceleration technology. The core interfaces with 28 lanes of SerDes (up to 10.3Gbit/s) and reconfigurable IOs including a physical interface (PHY) that supports many different interface protocols, including: DDR1, DDR2, DDR3, SPI4, HT1, QDRII+ and RLDRAM.
“Achronix first time silicon success through their efforts with eSilicon is a case study of three way collaboration and the supportive role TSMC plays to bring innovative designs to market in record time. It is a testimony to technical ingenuity coupled with sound business practices of all parties involved,” said Dr. John Wei, Senior Director, Communication Business Development, TSMC.
See: Achronix launches 120Gbit/s protocol converter for 1.5GHz SPD60 FPGAs