Rambus is working with Kingston Technology on the development of a threaded module prototype using DDR3 DRAM technology.
The threaded design effectively partitions modules into multiple independent channels that share a common command/address port.
Using industry-standard DDR3 devices the modules can support 64-byte memory transfers at full bus utilisation, which according to the companies can result in throughput gains of up to 50% when compared to current DDR3 memory modules.
Power efficiency is improved because DRAMs in threaded modules are activated half as often as in conventional modules, resulting in a 20% reduction in overall module power.
“As multi-core computing becomes pervasive, DRAM memory subsystems will be severely challenged to deliver the data throughput required,” said Craig Hampel, Rambus Fellow.
“Our module threading technology employs parallelism to deliver the higher memory bandwidth needed for multi-core systems while reducing overall power consumption,” said Hampel.
Rambus will have a static demonstration of this prototype at the Intel Developer Forum, September 22 – 24, 2009 at Moscone West in San Francisco.
See: Intel Developer Forum 2009 highlights
See: Rambus sees semiconductor shipments rise for Q3