Green point-of-load DC-DC converter designs need high efficiency and low IQ, so what is the optimal POL converter for embedded systems.
Most embedded systems are powered via a 48V backplane. This voltage is normally stepped-down to a lower intermediate bus voltage of 24V, 12V or 5V to allow power to the racks of boards within the system.
However, most of the sub-circuits or ICs on these boards are required to operate at voltages ranging from sub-1V to 3.3V, at currents ranging from tens of milliamps to tens of amps. As a result, point-of-load (POL) DC-DC converters are necessary to step down from either of the 24V, 12V or 5V voltage rails to the desired voltage and current level required by the sub-circuits or ICs.
Many ICs have operating voltage of 1.2V or less and at the same time, memory and I/O voltage requirements can vary between 2.2V and 3.3V. Thus, it is becoming impractical to use multiple single-POL DC-DC converters directly from the Li-Ion battery, and so system designers are adopting a more integrated approach.
Synchronous step-down converters provide a substantial improvement in battery run-time over traditional linear regulators due to their increased conversion efficiencies. These converters typically 95% conversion efficiencies and virtually eliminate the need for any heat sinking.
Nevertheless, this higher efficiency comes at a cost of extra circuit board space for an additional inductor for each channel, so it is paramount to keep the total solution footprint to a minimum. By combining multiple channels in a single synchronous step-down solution, they can all operate from a single input capacitor, thereby keeping the solution footprint minimal.
For a power management IC to be used as part of an energy-saving DC-DC converter it must have two main attributes. Firstly, it must have very high efficiency of conversion over wide ranging load currents. And secondly, it must have low quiescent current in both standby and shutdown modes.
For many embedded systems, the growing demands for increased current at ever-decreasing voltages continue to drive power-supply development. Much of the progress in this area can be traced to gains made in power conversion technology, particularly improvements in power ICs and power semiconductors.
In general, these components contribute to enhancing power supply performance by permitting increased switching frequencies with minimal impact on power-conversion efficiency. This is made possible by reducing switching and on-state losses while allowing for the efficient removal of heat. However, the migration to lower output voltages places more pressure on these factors, which in turn, creates significant design challenges.
Multiphase operation is considered to be a general term for conversion topologies where a single input is processed by two or more converters, where the converters are run synchronously with each other but in different, locked phases.
This approach reduces the input ripple current, the output ripple voltage and the overall RFI signature while allowing high current single outputs, or multiple lower current outputs with fully regulated output voltages. It also allows smaller external components to be used, which in the case of a monolithic device increases output current capability, as multiple, smaller mosfets can easily fabricated “on-chip.” This also has the added benefit of improved thermal management.
Multiphase topologies can be configured as step-down (buck), step-up (boost), and even forward, although generally buck is the more prevalent application. Conversion efficiencies of up to 95% from 12V in tot 1.xV out are commonplace today.
Furthermore, by incorporating a pulse skipping, pulse-width modulation (PWM) technique, high efficiency operation over multiple decades of load current can easily be obtained. This also has the added benefit of being able to obtain low quiescent current when delivering low levels of current to the load. A quiescent current in the tens of uA’s range are the norm.
The scenario described for embedded systems is not so different for handheld battery-powered devices, with the possible exception that many of these portable applications have strict limitations on component height. This can be a challenge for a power con¬verter, since the inductor and filter capacitors are usually among the tallest components. Nevertheless, a multiphase architecture is ideal for these applications even down to component heights of only 1.5mm.
Many of the monolithic multiphase converters from the various analog IC suppliers can deliver more than 10W of output power in a small size, with high efficiency, low profile and low output ripple than is achievable with a comparable single-phase converter.
Consider, as an example, a monolithic, synchronous, high switching frequency (up to 2MHz per phase), four-phase power IC architecture. An example of such a product is the LTC3425. This would allow the use of small, low cost inductors rather than a single large, bulky inductor, and require much less output filter capacitance than an equivalent single-phase circuit because the effective output ripple frequency is up to 8MHz. All the power mosfets required are fabricated on-chip.
Furthermore, designing a converter using a multiphase approach is no different to designing a traditional single-phase converter. All the power switches are internal, so the four-phase operation is transparent. The current limit and switching frequency for all four phases could easily be programmed by a single resistor, as in single-phase designs. Similarly, setting the output voltage and compensating the loop would be no different to other familiar DC-DC converter designs.
Tony Armstrong is product marketing manager at Linear Technology