A French start-up firm has revealed details of its network-on-chip technology, which replaces conventional bus structures with a packet-based network.

Arteris said networks are the only way to communicate on-chip, especially as process technology shrinks and with rising use of intellectual property (IP).

"This type of technology is scalable for the next three process generations. In a nutshell we think, going forward, busses are dead," said Kent Jaeger, v-p of sales and marketing at Arteris.

"Our approach is fundamentally different - it's a homogeneous, scalable switched fabric," said Jaeger, which can be thought of as Ethernet on a chip.

He said the network can be scaled to connect any number of IP blocks. The technology will employ both synchronous and asynchronous links, the former for locally connected blocks, the latter over longer distances.

In addition, the networks can employ both serial and parallel connections, using any physical interface standard, with data rates up to 600 or 700MHz, the firm claimed. Overall data bandwidth could be triple that of conventional busses.

"Even though the entire approach is revolutionary, we're compatible with existing standards," said Jaeger. The network can connect to IP blocks designed to attach to busses such as AMBA, OCP or CoreConnect.

The firm also promised it has solved the issue of quality of service, ensuring that real-time systems, such as video, do not suffer from using a packet-based network.

The firm will begin licensing IP and EDA tools later this year. To confirm its design it has taped out a test chip made using 0.13µm at TSMC.

Arteris' founders, who come in the main from GlobespanVirata, have raised $12m in funding.