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|NewsletterThe industry furore on whether structured Asics are a profitable business, or just another opportunity to lose money, has been joined by Altera.
| Altera's Danny Biran |
“Absolutely it’s profitable,” Danny Biran, v-p for product and corporate marketing at Altera, which has a structured Asic product called HardCopy, told Electronics Weekly.
“It is a good business for us, and its profitability does
not negatively affect the margins of the company,” said
Biran. Altera’s margin is 68 per cent.
Biran was responding to Armin Derpmanns, general manager of
Toshiba’s Asic and SoC business,
who told EW: “Structured Asic is not making any
money. The volumes are not there, and suppliers have to take a load
of costs on their own shoulders, like IP development costs. They
can only charge a minimal NRE [non-recurring engineering charge].
We don’t see how you can make any money like this.”
Biran countered: “For a 90nm design with, say, 2.2 million Asic gates, 9Mbits of SRAM and 1.5 million gates for DSP and multipliers, our NRE is between $250,000 and $300,000.”
The cost of IP development is not an issue because, said Biran: “The IP used in HardCopy is the same as we use in FPGAs, we don’t have to develop it twice.”
Unit cost would be in the ‘tens of dollars’ for 10,000 to 100,000 volumes. Altera has not yet had a million unit order for HardCopy.
Altera guarantees that it will pay for a re-spin where a customer has correctly performed the verification of the design on an FPGA. No re-spins have been necessary for two years, said Biran.
The low-cost of HardCopy ICs has encouraged Altera to promote it to venture capitalists and start-up companies wanting to get their first products out for a fraction of the cost of conventional SoC. Biran said: “One start-up customer, TelASIC, told us ‘HardCopy saved the company’.”