Power consumption, not performance, is now the overriding concern for system-on-chip developers, according to the chief executive of Scottish EDA firm CriticalBlue.
David Stewart said the increased focus on power budgets that comes with 90nm semiconductor process technology is pushing designers to use distributed processing.
“In the past, process changes doubled processor speeds and software took care of itself,” said Stewart. “At 90nm, power consumption limits processor speed, so management of the power budget is one of the drivers of multi-processor thinking.”
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David Stewart: Power management is driving
multi-processing
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This change in emphasis has changed the way the firm views its tools. CriticalBlue’s Cascade tool takes software that is causing some bottleneck in a system processor, and remaps it to a custom co-processor, with some significant speed-up of the function.
“When we started, we were focused on software acceleration,” said Stewart, “but now our focus is more on saving power. By making software run faster, we can lower the clock rate and hence save power.”
In many of the designs in which the firm’s Cascade tool is used, the original software will run perfectly well on the main processor, said Stewart. However, power will be well over budget.
Stewart referred to an STMicroelectronics project in which an MP3 audio codec was to be added to a digital camera.
Using Cascade, some 200 functions from the 5,000 lines of C code were offloaded to a hardware co-processor, bringing the power back into line and cutting 90 per cent of the load from the main processor.
However, the ST software engineers did not want to start learning how to do hardware design: "The challenge is to off-load C-code without needing to understand the algorithms," said Stewart. Viewed in this context, he sees Cascade as a bridge between the domains of hardware and software.
Meanwhile, CriticalBlue is in the middle of a new round of funding. “We’re looking for about $5m this time,” said Stewart.
www.criticalblue.com