Latest News
|NewsletterMentor Graphics recently conducted a survey of European electronics professionals to find out about current and former applications, general design problems they have encountered and their perceptions and experiences with electronic system level design methods. Shawn McCloud looks at the findings
In the world of electronics, new design methodologies are often slow to reach mainstream acceptance. In general, engineers do not adopt new methodologies until design challenges become exceedingly difficult and eventually break the established methodology.
In the hardware domain, we have seen illustrations of this concept in the transition from schematic capture to GDSII and eventually to RTL (register-transfer level). Now with a new generation of devices in development, we are seeing yet another transition, this time to electronic system level (ESL) design.
The reason is simple - design complexity. Even if you take into account the growing reliance on intellectual property (IP) re-use and platform-based design, Gartner Dataquest estimates that 30 per cent of the gates in next-generation designs will still need to be specified and verified. That amounts to roughly 15 million gates in a 50 million gate 90nm Asic design.
| Shawn McCloud |
Hand coding a 15 million gate design with RTL methodologies is a long, complex task which increasingly leads to sub-optimal designs, functional errors, and/or extended design times. With larger, more complex applications in the works, designers need tools and methodologies to dramatically increase productivity, provide relief from complexity, and reduce design time.
Electronic design automation (EDA) companies are hard at work creating new ESL design tools that help designers better manage these millions of gates. But a persistent problem remains: ESL is a broad term, and many in the electronics industry are unclear about what it is and how it can help.
To gauge industry perceptions and adoption trends in ESL design, Mentor Graphics conducted a survey of European electronics professionals. The survey inquired about current and former applications, general design problems they have encountered, and their perceptions and experience with ESL design methodologies. What we found is that many designers are encountering the kinds of difficulties that ESL design promises to resolve. We also found interesting data on why some engineers have adopted ESL, why some have not, what it will take to adopt ESL methodologies, and when that might happen.
ESL’s killer app
When asked which of the design tasks in their existing methodology could be improved, survey respondents gravitated to issues surrounding system modelling and verification, most commonly citing increased simulation speed and ability to do hardware/software co-verification.
We could deduce from this that respondents want to create virtual system prototypes that simulate at adequate speed to enable early software validation, system performance analysis and overall superior system architectures. And indeed, when asked which design tasks were necessary for an effective ESL methodology, system modelling topped the list again.
These responses align nicely with the EDA industry’s marketing messages about ESL, many of which focus on high-level modelling and early assessment. Since only 24 per cent of respondents have implemented ESL methodologies prior to the survey, it would be reasonable to attribute some of this tidy alignment to the influence of marketing on those who do not yet have direct experience of ESL. Validation of the alignment will come when ESL tool sales start to rise more sharply.
Common threads of ESL users
Among the respondents who have used ESL methodologies, an overwhelming majority say they provide an acceptable or greater return on investment. This statistic obviously bodes well for the future of ESL design.
As more designers begin to encounter problems with complexity, they will need assurances that ESL methodologies and tools are mature and deliver on their many promises.
With a growing record of successful implementations, it appears ESL design tools have satisfied questions of maturity and reliability, and are poised for further growth among mainstream designers.
In fact, respondents who already use ESL tools cite risk reduction as a top reason for adopting the new methodologies. This is particularly true of ESL synthesis, as automation reduces the number of errors introduced during hand coding of a design.
The traditional design flow uses a process of ‘progressive refinement’ in which one starts with a high abstraction source (typically C/C++) and manually refines the high-level description into lower and lower abstraction models until finally one achieves a model which can be synthesised into hardware. But each transformation introduces errors and each error must be found, fixed and then re-verified. While these hand-coded errors were acceptable when designs were smaller, the number of bugs increases proportionally with the number of gates in silicon, creating a verification burden that is growing as fast as complexity.
In addition, high abstraction ESL models allow system designers to build virtual prototypes, allowing them to fully validate their system and explore different architectures with minimal effort. This early visibility into performance and functionality allows designers to find an optimal design rather than settle for the sub-optimal, which reduces the risk of functional failures and re-design later in the design cycle.
Non-users speak
When non-users of ESL tools were asked why they had not adopted the new methodologies, nearly one third said their designs are not complex enough to warrant ESL methodologies, that is existing RTL methodologies suffice.
However, the majority - 57 per cent - of this same group of non-users predict that within the next three years design complexity will escalate to a point that will require ESL technology.
Other top reasons for not using ESL tools point to the pragmatic nature of these respondents, with 34 per cent indicating that they are waiting for mature technology, while 37 per cent say they are waiting for cheaper tools. However, these two responses present EDA tool vendors with a conundrum - how to make a profit on ESL tools when customers want more features at a lower price?
While the EDA industry has made tremendous achievements in ESL technology, some work remains.
The complete survey report examines ESL design trends in greater detail, revealing insights on adoption trends, barriers to adoption, specifics on which design tasks are most needed, and data on language preferences in ESL. For more information on the report, or to see the complete results, visit www.mentor.com/products/c-based_design.
Shawn McCloud is high-level synthesis product line director at Mentor Graphics