The constraints imposed by the chip industry having reached a power/density ceiling have persuaded Altera to develop a programmable silicon fabric at the 65nm process node where customers can select the frequency/power combination they want for their application.

"Power is the critical factor. Leakage is a big deal for us," John Daane, CEO of Altera, told the Globalpress Summit Conference in Monterey.

"You can't help matters by decreasing the voltage any more," said Daane. "You're not reducing the power supply any more, so increasing the density and the frequency works against you."

As a result, at 65nm, Altera has adopted the concept of 'Just Enough Performance'.

The concept includes a programmable fabric where the customer selects, block by block, the frequency and power levels required for the application. Altera calls it Power Optimised Design.

John Daane

Daane reckons that the programmable logic business has become a process-intensive activity.

"We have more process engineers than any other fabless company," said Daane. Altera has 75 process engineers, including engineers involved in yield enhancement, but not those involved in characterisation.

"We are manufacturing the largest die in the industry," said Daane. "Yields are very important to us."

The result of spending so highly on process technology is, according to Daane, that Altera has margins on its 90nm products which are higher than the company average, while rival Xilinx has publicly stated that its margins on 90nm are lower than the company average.

www.altera.com