A number of technologies using high level behavioural modelling have come into the market with the specific aim of solving the problems resulting from increased system complexity
High level behavioural modelling has been a significant aim of the electronic design automation industry for several years now. As systems become more complex, with multiple processor cores and many peripherals in the single chip, it is increasingly hard to debug and verify these systems, and modelling the system on a chip in the early stages can help minimise the problems further down the design chain.
But the industry has been moving on from high level modelling as a verification tool to a system development tool, looking to run embedded code, even production code, on virtual models of the processors and peripherals.
“Multicore debugging is an enormous new challenge for software developers, as our server customers discovered in the last few years, and will be especially difficult for embedded software developers,” says Peter Magnusson, founder and chief technology officer of high level simulator developer Virtutech. “Simulation brings not only the capability to run code before silicon exists but also has many compelling advantages once it is available since it is so much more observable and controllable.”
The problem is that there is no standard way of doing this, and even with the proprietary technologies there are two different ways of tackling the problem. A cycle accurate model tends to be accurate but slow, while a behavioural model tends to be fast enough to be useful but will not pick up all the potential problems with the code.
 |
At 90nm and 65nm, more than half the system challenge is designing the software
|
The traditional ESL vendors in this space - Virtutech, Vast System Technology and Virtio - have been developing proprietary technology to tackle this problem, while The MathWorks, with its Simulink tool, and Celoxica with its Agility SystemC compiler, are focusing on algorithmic development.
But hardware verification experts CoWare have also entered the market with a tool based on the SystemC standard, concentrating on designs in the portable equipment market and in digital imaging.
“We think this product is going to provide the critical bridge between the world of EDA and the world of embedded software because it makes an accurate model of the hardware and adds a debug environment so that it can be used by software developers,” says Alan Naumann, president and chief executive of CoWare. “The modelling environment uses full, native SystemC and we believe this is the first, as well as using processor models such as those from ARM which use the LISA language.”
“In the real time environment we can boot Linux in under a minute on a full platform, which is executing one billion instructions,” adds Naumann. “Virtio has done some similar stuff but we have a tool-based model rather than a service.”
 |
CoWare's development flow synchronises software development with the hardware
|
The tool is being used by Motorola’s mobile phone division, says Naumann.
“The big problem for software developers was they were developing the software without knowing how it would perform on silicon. The big difference is that now they can synchronise the software with the hardware development on a daily basis, and the hardware model is always in sync with the software,” he says.
“Motorola calculated they saved $45m a year using a virtual platform. What’s great is that Motorola is asking suppliers to put their models in CoWare SystemC. But we are also going to jump start the market with a standard library with processor models, busses, peripherals, DSP, control logic and memory.”
 |
ARM's Vojin Zivojnovic
|
But there are problems. “SystemC can be stretched,” says Vojin Zivojnovic, vice-president of ESL tools at ARM. “The issue is that SystemC gives you a huge amount of freedom and if you model it one way and your partner models it the other, it simply doesn’t work.”
That is why there are new standards emerging, such as the transaction level modelling (TLM) specification from the Open SystemC Initiative (OSCI) to define how models communicate.
The performance of SystemC has been cited as a problem, but this is not necessarily so according to Zivojnovic. “If you take SystemC for a core booting Linux, although the communication between the peripherals and core is SystemC, as long as you reside mostly in the core any SystemC latency doesn’t matter.”
Vast Systems Technology, which is focusing on the automotive, consumer and wireless markets, is also looking at the standards route as it expands.
“We opened up the technology in two ways a year ago,” says Linda Prowse-Fosler, vice-president of marketing and business development. “We enabled the import of SystemC models and we have a strategy to co-simulate with third party simulators. We are planning greater interoperability with other models and how we more aggressively support SystemC to allow users to export Vast models or SystemC models.
“Depending on how well the models are written, they will have some effect on the performance, but the customer will identify the models that are the bottleneck to performance or accuracy and replace them with a Vast model.”
This has a business rationale as well, she says. “Unlike the previous Vast strategy, we understand there is no way to build a large company on proprietary technology.”
But the company is sceptical about other approaches. “Some tools have high performance models and then you switch to cycle accurate models for accuracy,” says Dr Elof Frank, Vast’s manager for Central Europe. “That is a brittle approach for customers with two sets of models. It will be a very difficult environment.”
Virtio has a different focus, aiming to model the entire system, not just the SoC, but provides the capability more as a service.
“If you talk to customers, many of them were burnt badly going to SystemC because it didn’t work for them,” says Shay Ben Chorin, chief executive of Virtio. “The biggest customers went in that direction and failed, and not just failed but failed miserably. Initially it looks great and performs in small scale trials but it doesn’t scale, it falls over.”
The firm found that it was not enough for customers to develop their own model even when given the tool to do it. “You need to move to a complete solution, and then you have two options – do the service for free and charge for the tools or charge for the services and give the tool for free,” says Chorin.
“Another issue we found was that we can’t just throw a tool out there because we need a lot of IP and domain knowledge which was very, very hard,” he adds. “That was very important for us. We definitely want to own the IP at the end of the project. If the library of IP is not growing then at some point [the business model] is going to crash.”
Chorin is also not a fan of the standards process. “It’s not simple. Standardisation is good but it has to be more along the lines of the APIs. It would be good for the industry to standardise on a database format or API and allow everyone to solve the problems in different ways,” he says. “I think the industry will need to find the right level of modelling and the right combination of technologies.”
But this move is causing some fundamental changes.
“When it comes to the cycle by cycle analysis it is so IP dependent, the EDA companies are moving away from that and have reduced their investment in that domain,” says Zivojnovic at ARM.
Indeed, Cadence Design systems spun out its system level modelling capability to CoWare for exactly that reason.
“We think that eventually some of these EDA companies will come back with solutions, but more in the business of combining the system level cockpits of the IP companies such as ARM’s system development tools, Xilinx’s cockpit or Denali’s memory tools,” says Zivojnovic. “The move by CoWare shows us there are other domains where they can help. But this market will grow fast by not being so involved in the details but going for system agnostic solutions and going into the algorithmic domain.”
ARM
Celoxica
CoWare
The Mathworks
VaST System Technology
Virtio
Virtutech