Freescale Semiconductor’s MRAM cell is four times smaller than a six transistor SRAM cell, giving it a significant potential as a replacement for mid-range performance SRAM, according to Dr Saied Tehrani, director for MRAM technology at Freescale.

“The reason why our cell is small compared to other MRAM cells is because we use one transistor and one magnetic tunnel junction (MJT) and the MJT sits on the top of the transistor,” Tehrani told Electronics Weekly at the Freescale Technology Forum in Orlando, Florida last week.

Freescale’s 4Mbit MRAM has an access time of 35ns for both the read and the write making it competitive with mid-range SRAM. It is positioned, and priced, to be a replacement for battery-backed SRAM.

It is not fast enough to compete with high-speed SRAM which has sub-10ns access times. "It can't replace Level One cache", said Tehrani.
However, with a cell size four times smaller than SRAM, the Freescale MRAM has the potential to get considerably denser than the current 4Mbit which is made on a 0.18 micron process. For instance a 90nm process delivers a 64Mbit MRAM.

Asked by Electronics Weekly why, if the cell size was four times smaller than SRAM, Freescale’s MRAM wasn’t four times larger than the largest SRAM (now at 256Mbit), Tehrani said that Freescale’s intentions for the technology lay mainly in the embedded space.

One reason for this is that embedded MRAM requires only six extra masking steps on top of standard logic, said Tehrani.

However, as now constituted, Freescale's MRAM will not compete with NAND flash. "Fundamentally, the cell size will be bigger than NAND flash", said Tehrani.