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|NewsletterModern Asic design complexity demands a comprehensive verification strategy. Verification teams now apply transaction level modelling, assertions, formal verification, ATPG, BIST, emulation, and the list goes on.
These approaches have proved effective in eliminating all but the 'corner-case bug' – the gotcha that does not appear until your Asic is back, and the system is in the lab, running live traffic. All is running fine for days, until it happens… the nasty crash due to obscure combinations of real-world stimuli and/or software/driver instructions never contemplated.
The answer is FPGA-based Asic prototypes that enable the 'corner-case bug hunt' with real-world stimuli before Asic sign-off. With high-capacity 65nm FPGAs and readily available low-cost multi-FPGA boards, developing prototypes running live traffic is easier and more cost effective than ever.
Unlike expensive emulators, prototypes can be replicated and provided to functional verification and software teams simultaneously. What is more, FPGA-based prototypes integrate cleanly with other methods like system-level transaction-level modelling.
While FPGAs are a mainstream Asic verification approach, limited visibility into all signal and memory states has prevented complete adoption. Recent breakthroughs tie data from on-chip logic analysers (embedded in the FPGA) directly to RTL source code, enabling designers to analyse all memory and signal values when the corner-case bug occurs.
As such, bugs missed by simulation, or that take weeks to find in an emulator, are found instantly and debugged quickly. New methods are on the horizon allowing the designer to replay events leading up to the bug within their simulator, answering the question: “How did this unlikely bug happen in the first place?” Such approaches will expand prototyping even deeper into emulation territory.
Kurt Keutzer from U.C. Berkeley was quoted several years ago saying “the future is fully programmable”. At Synplicity we believe that Asic verification will soon be fully programmable as well.