A French EDA firm claims to have made a breakthrough in chip design with a tool which analyses noise for analogue and RF signals as well as digital elements of the design.
Grenobles-based Coupling Wave Solutions (CWS) said the tool will address the increasing analogue and RF signal integrity challenges which can appear with new process technologies at 65nm and 45nm.
CWS said its software 
tool can be used to predict noise propagated through a chip’s substrate, interconnection, pad ring and package.
“Until now, such analysis has been attempted using different software coming from different vendors separately analysing substrate coupling, interconnection coupling or package coupling, and all of them have failed,” said Brieuc Turluche, CWS CEO and co-founder.
“Noise interference is a common problem to all these coupling paths that must 
be analysed simultaneously and by one unified application,” said Turluche.
The software, which will be generally available in April, will be used to identify signal integrity problems coming from complex devices where RF, analogue and digital signals are integrated in the same silicon die.