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Saturday 11 October 2008
Components
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|NewsletterProgrammable Logic and Asic
Altera will ship 45nm FPGAs next year
Wednesday 6 June 2007
Altera will have 45nm product out next year, according to John Daane, the company’s chairman, president and CEO.
“The key 65nm power innovations were designed with 45nm in mind, we’ve done a lot of parallel development,” said Daane. “It has allowed the development engineering teams to accelerate 45nm production.”
Daane added that Altera has run three 45nm R&D test chips and has five more to do. “I know you will see product from us next year,” said Daane. “We’ll be shipping products on 45nm in 2008. Design tools for 45nm will be released next year.”
Daane would not be drawn on whether the first chips would be high-performance products such as the Stratix family, or low-power chips like the Cyclone family.
Altera’s foundry, TSMC, is currently planning to have the low-power process ready first. But Altera, as lead partner on high performance 45nm, could, presumably, push TSMC for an earlier introduction of the high power process if its 45nm Stratix design is ready.
At the 65nm generation, the low-power Cyclone was out before Stratix. It was rumoured that Altera had gone back to the drawing board on the 65nm Stratix III design, so delaying its introduction.
As it is, the 65nm Stratix III is now due to ship in August. The equivalent 65nm product from main rival Xilinx, started sampling in May last year and shipping in volume earlier this year.
Asked if Altera had suffered any adverse consequence from being later to 65nm than its main rival, Daane replied: “Last quarter was the first quarter that Xilinx had revenue from 65nm. We haven’t been first in any generation to ship product, but we haven’t suffered any adverse consequences from it. Being first to a process node creates good press releases, but you also need to innovate the architecture.”
“The key 65nm power innovations were designed with 45nm in mind, we’ve done a lot of parallel development,” said Daane. “It has allowed the development engineering teams to accelerate 45nm production.”
Daane added that Altera has run three 45nm R&D test chips and has five more to do. “I know you will see product from us next year,” said Daane. “We’ll be shipping products on 45nm in 2008. Design tools for 45nm will be released next year.”
Daane would not be drawn on whether the first chips would be high-performance products such as the Stratix family, or low-power chips like the Cyclone family.
Altera’s foundry, TSMC, is currently planning to have the low-power process ready first. But Altera, as lead partner on high performance 45nm, could, presumably, push TSMC for an earlier introduction of the high power process if its 45nm Stratix design is ready.
At the 65nm generation, the low-power Cyclone was out before Stratix. It was rumoured that Altera had gone back to the drawing board on the 65nm Stratix III design, so delaying its introduction.
As it is, the 65nm Stratix III is now due to ship in August. The equivalent 65nm product from main rival Xilinx, started sampling in May last year and shipping in volume earlier this year.
Asked if Altera had suffered any adverse consequence from being later to 65nm than its main rival, Daane replied: “Last quarter was the first quarter that Xilinx had revenue from 65nm. We haven’t been first in any generation to ship product, but we haven’t suffered any adverse consequences from it. Being first to a process node creates good press releases, but you also need to innovate the architecture.”
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