Spansion has the only cost structure that can succeed in the NOR flash business now that it is producing on 300mm wafers using 65nm technology at its new wafer fab, SP1, at Aizu in Japan, according to the company’s CEO, Dr Bertrand Cambou.

“Intel don’t have a cost structure in place today to compete with us,” Cambou told Electronics Weekly, “they lost $300m on revenues of $490m in Q2, and they lost $300m in Q1. They have to sell at below cost to compete.”

Spansion’s cost advantage will improve further as the Aizu fab moves into volume production on 300mm by the end of the year, while its rivals are stuck on 200mm. The cost advantage of 300mm over 200mm is 30 per cent. The cost advantage will improve again by 50 per cent next year when it moves to 45nm before its rivals.

When the cost advantage of using the Mirrorbit technology used by Spansion, compared to the floating gate technology used by rivals, is taken into consideration, that adds another 40 per cent cost advantage for Spansion over chief rivals Samsung, and the new Intel-ST joint venture Numonyx.

Numonyx, which has started off strapped for cash, has no immediate route to moving to 300mm technology. The 300mm fab at Catania is just a shell, and the joint venture is due to start life with a big debt which may prevent it from facilitising the fab.

Another advantage for Spansion over its rivals is that, according to Cambou, his rivals are trapped in a technology which won’t scale.

“I believe floating gate will be severely compromised below 45nm,” said Cambou, “it may do 40nm but if you go below that there will need to be big trade-offs.”

By contrast, Mirrorbit will scale to 25nm and beyond, he reckoned. “We’re going for it,” said Cambou, “we need to be relentless.”