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Tela Innovations says it can help IC designs at 45nm by adjusting the structure of a design to fit a pre-determined shape, the Globalpress Summit Conference in San Francisco was told yesterday.
Earlier in the Globalpress conference Jack Harding, CEO of eSilicon, said: "45nm is nearly impossible", while Wally Rhines, CEO of Mentor Graphics said: "I believe the design flow is breaking mainly because of variability in manufacturing and design."
The problem is caused by what the industry calls 'corners', i.e. parts of the chip which are particularly susceptible to unpredictable faults.
Tela has a tool which can fit into existing EDA design flows which converts a design into a grid made up of straight lines which, says the company, has resulted in a 15 per cent reduction in die size of a customer's 45nm chip and, according to simulations, delivers a 2.5 per cent reduction in leakage.
Tela says it has 'less than five' licensees for the technology, and has a 'handful of customers in evaluation mode'.
It has some heavyweight backers including Intel Capital and AsiaTech which came on board at the B series funding stage, which completed a couple of months ago.
Tela is working with ASML, and delivered a joint paper on its technology with ASML and Applied Materials, at the recent SPIE Advanced Lithography Conference.