The days when RF and microwave design were stand-alone matters are over. Modern RF designs have multiple RF modules combined with high- speed digital and analogue technology sharing the same board space.

RF designers testify that their daily routine is filled with re-spins and long cycle times and claim poor tool integration and lack of RF awareness in the PC board design tools as the main culprits.

Integrated system level design is essential to cut the number of cycles as well as individual cycle time. With these issues in mind, Mentor Graphics and Agilent have joined forces to rectify the problems traditionally caused by the disconnect between the classic RF and PCB design flows. 

RF aware PCB design
No integration, no matter how good, can help maintain design intent between PCB design and RF design unless there is a common understanding of “the world” between the tool sets. Preserved design intent is critical, as this is the foundation to support multiple iterative round-trips of design data between tools without losing information.

As part of this project, PCB design tools were extended with parametric RF shapes and a new DRC model that understands, for example, that a piece of metal to ground conducting RF energy is not always a short circuit.

Integrated flow
With this foundation in place, integration of the RF design tool and PCB needed an overhaul. For more than ten years, this integration has been based on two-way translation of ASCII IFF format files. Although capable of conveying some of the design data, this format is far from adequate to support seamless round-trip integration.

Lack of library synchronisation is one of the more critical issues. RF and board designers have struggled with this model for along time and despite several attempts to improve the interfaces only marginal results were seen.

Something different had to be developed and this has lead to a network-based inter-tool communication providing a dynamic two-way link between RF design and system level PCB design.

To fully support today’s concurrent engineering process, multiple board designers can operate simultaneously on the same design data base and each link to one or multiple sessions. Now an RF module can be designed and verified in the simulation tool, and when appropriate, be pushed over and become an intelligently integrated part of the system-level schematic and board rather than the “dumb black box” circuit of the past.

At this stage, updates to the circuits can be made in either environment and the impact can be simulated.

Each RF circuit is contained as a grouped object to help maintain traceability, version management and design re-use. As design intent is preserved, any number of iterations can be processed without the usual cost in cycle time. In addition, as the RF module can be simulated in the context of the actual system level PCB, its function can be validated at a more detailed level to help cut design cycles.

RF PCB bottlenecks
Three well known RF PCB design bottlenecks are groundplane clearance, ground via stitching, and meander line routing.
In the classic design process, the RF metal was imported as a black box piece of metal and ground clearance was hand crafted as plane voids on every layer needed. When the RF circuit was updated — a frequent operation — the cutouts had to be manually edited to reflect the new circuit.

With a new design flow that really promotes iterative updates between RF design and PCB design, manual update is far too slow.

Instead, an intelligent parametric RF shape clearance is introduced to let the RF circuit clear ground exactly the way the RF engineer defines it — and to have it parametrically updated as the RF circuit evolves during design — and also for any number of layers above and below the RF shape.

Meander lines are typically used instead of normal PCB traces to connect RF circuits. They can have tapered width changes, optimal impedance mitre, or curved bends.

In the past these were made as metal-plane shapes and were difficult to edit. Furthermore, as they were just metal polygons, the only way to simulate was to use an EM solution which takes a long time. The new meander line design object resolves these limitations and is even automatically decomposed into circuit models for fast circuit simulation.

Via stitching to reduce radiation losses or to prevent parallel plane excitation is another typically manual process that, in the past, would require countless hours or days and need manual rework every time the circuit is updated in a design iteration. A new engine let designers automatically generate via patterns and contour stitching parametrically and even include this in the RF simulation

The demand for integrated design teams across technology and global boundaries dictates that a direct tool integration where the tool sets share a common understanding of RF is the only way to success.

Per Viklund is director, RF & IC packaging systems design at Mentor Graphics