"Why are we here, that is the question. And we are blessed in this, that we happen to know the answer. Yes, in this immense confusion one thing alone is clear. We are waiting for Godot to come."  [Waiting for Godot, Samuel Beckett]

In this most celebrated play of the 20th century, two tramps patiently wait by a tree for days for someone named Godot to arrive, making excuses for idleness ("nothing to do") while they wait. Not even sure what Godot will do for them when he arrives, they continue to wait, anticipate, reflect, argue, dream, and wait some more. Of course, Godot never arrives.

In our own industries we can find it easy to wait for others instead of taking action to solve problems that are meaningful to us. In the semiconductor IP space, we have waited for many years for the emergence of standards around the development and use of IP.

While there is some progress on IP interoperability being driven by the SPIRIT Consortium, there has been little progress to date on the IP design side despite many attempts over the years. In other words, success in standards related to making IP remains elusive.

Darwinian forces

That's not to say we are not making progress. We have all heard many horror stories about companies getting burned by buggy IP cores and, fortunately, the Darwinian forces of natural selection have mostly removed them from the market. The remaining IP companies in business today are here because they understood that quality matters and that making IP is a serious business.

IP companies, however, have it a bit easier compared to semiconductor companies. IP companies typically focus all their energy into a very limited number of products, for example, a microprocessor or USB core. With enough focus and resources, quality IP products can be consistently produced- sometimes by brute force means.

Semiconductor companies are not as lucky as IP companies. They are faced with the daunting challenge of generating their own differentiated IP and integrating that in their chips together with purchased third-party IP. They cannot afford the luxury that IP companies have, of focusing on one IP design; they produce hundreds every year.

Effective methods of IP design

As a result, a lot of semiconductor companies struggle with developing effective methods of IP design and reuse within their companies, if for no other reason than that the size of the design organization is immense and impossible to control by brute force.

However the struggle, I have found European semiconductor companies not idly waiting for external standards to take hold before acting and far in advance of the rest of the world in their recognition of the need for internal IP development standards. I am personally most familiar with that of NXP's (formerly Philips Semiconductors) which is perhaps the industry's most advanced example of IP reuse in action and would like to relate its interesting story here.

NXP Semiconductors has incorporated a practical and thorough IP reuse culture throughout the company by means of standardization, technology, and management practices to hold it all together.

Initiated by a challenge from management to build a complete new SoC in one month, NXP engineers began almost ten years ago to work towards a vision of developing an engineering organization where all design activity would be leveraged as reusable IP. Such an organization could produce designs that could be reused again and again by different design teams, providing the company with a financial advantage over competitors by being able to provide very complex devices to the market in record time with high quality.

CoReUse

The result of this is CoReUse, a complete IP methodology embodied in a set of standards that are in place across the whole of the NXP engineering organization. CoReUse heavily leverages the work of standards coming from organizations such as the IEEE and the SPIRIT Consortium, producing standards such as IP-XACT. For IP methodologies to be successful, they need to possess certain attributes:

• They need to be complete and cover all the necessary aspects of design such that there is as little ambiguity as possible to avoid any misinterpretations by engineers.
• Every rule requires a tool that can be automatically checked since engineers could make mistakes in interpreting rules.
• The methodology must be living and adaptive so that it can grow as technology changes, new standards are adopted and new best practices are discovered.

NXP understood that successful deployment of a reuse methodology required a set of tools that could enable engineers to automatically check their work.

QCore

Again not waiting for external parties to create such a tool, NXP developed QCore for this purpose as a general purpose cockpit for checking and certifying an IP's compliance to the CoReUse standard.

By having an automated check for every rule, the company can insure consistent and reliable adherence to the methodology. QCore is a web-based tool that ties into NXP's existing EDA environment allowing automated execution of an IP design flow to ensure the IP can be properly integrated in a chip by an IP user. QCore produces certificates that show the compliance level of the IP to the CoReUse standard so that users of the IP can see the quality and completeness level of the IP.

The adoption of any design methodology is challenging because methodologies always involve controlling the behavior of creative people.

Semiconductor IP design methodologies are especially challenging because they have the additional problem of being tied to the moving target of semiconductor design, which changes at a rapid pace. In the rapidly changing semiconductor space, the benefits of standardization will be quickly lost if the methodology loses its technological relevance.

Therefore, built into every successful deployment of such standards should be the ability for the standard to evolve along a path of best practices and innovation. NXP has accomplished this by having a dedicated team of methodologists who not only are responsible for maintaining this standard and tools, but also for driving its use into business units and incorporating feedback from teams that actually use it.

What is inspiring about NXP's CoReUse story is not that it represents some break-through technology but rather its action-oriented nature. To respond to a practical problem with real solutions without waiting for others to lead the way is a glimpse into our future. In other words, rather than waiting, be Godot and arrive.

Warren Savage, President and CEO of IPextreme, is a well-known and published authority in the field of semiconductor intellectual property.

He has a long history of pushing the envelope of design methodology from his work in fault tolerant computing at Tandem Computers in the 1980's and driving reliable design methodologies into commercial practice at Synopsys for its DesignWare IP product in the 1990s. Much of his thinking became embodied in the seminal book on IP reuse, the Reuse Methodology Manual.

Previous columns

(Nov 07) Warren Savage On: Making the Case for Invented Here

(Dec 07) Warren Savage On: Swiss Cheese Solutions

(Jan 08) Warren Savage On: Collaboration Needed for Success

(Feb 08) Warren Savage On: Knowing Your No

(Mar 08) Warren Savage On: The Next Big Thing

(Apr 08) Warren Savage On: Gumming Up the Works?