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Saturday 10 January 2009
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|NewsletterProgrammable Logic and Asic
Thales links with Mentor Graphics for FPGA design training
Wednesday 4 June 2008
Thales has worked with design tool firm Mentor Graphics to develop a new type of tool and design methodology training course which the defence firm will offer to a hundred engineers over the coming year.
The aim has been to integrate the three training courses FPGA designers have typically received. The new training course integrates hardware description language (HDL) theory, tool application and familiarisation with Thales’ in-house methodology.
Whereas it typically took six months for a new recruit to undertake the three courses it should now take a maximum of three months and by combining the courses the number of training hours is reduced by 40 per cent.
Thales UK’s optronics business in Glasgow piloted the course, and it will now be extended to the Staines and Bury St Edmunds sites, then two further sites from the land and joint systems business, Crawley and Wells.
It will be made available to the rest of Thales’ UK sites and discussions are underway to provide the course across other European sites via Thales’ engineering and process management team in France.
“Integrating company-specific methodology instruction with tool training is a no-brainer decision. It gets engineers productive quickly, cuts training administration and allows us to standardise best practice so that engineers can move easily between projects to put design resources where they are needed,” said Andrew Parmley, head of electronics at Thales UK’s optronics business.
Thales’ engineering and process management business maintains a range of training programmes called Workbenches. In the case of the FPGA Workbench this contains tools from Mentor Graphics, including HDL Designer, ModelSim and Precision Synthesis. An in-house user interface allows engineers to follow Thales design rules, configuration and library management conventions and other aspects of best practice and standardisation such as DO254.
Thales has a major graduate recruitment programme underway and the course will be a part of the induction process, but it is also intended as a refresher for existing Thales engineers adopting FPGA Workbench. The new course will accelerate the rollout of FPGA Workbench across Thales sites, since the Workbench methodology will be imparted at the same time as tool training.
The aim has been to integrate the three training courses FPGA designers have typically received. The new training course integrates hardware description language (HDL) theory, tool application and familiarisation with Thales’ in-house methodology.
Whereas it typically took six months for a new recruit to undertake the three courses it should now take a maximum of three months and by combining the courses the number of training hours is reduced by 40 per cent.
Thales UK’s optronics business in Glasgow piloted the course, and it will now be extended to the Staines and Bury St Edmunds sites, then two further sites from the land and joint systems business, Crawley and Wells.
It will be made available to the rest of Thales’ UK sites and discussions are underway to provide the course across other European sites via Thales’ engineering and process management team in France.
“Integrating company-specific methodology instruction with tool training is a no-brainer decision. It gets engineers productive quickly, cuts training administration and allows us to standardise best practice so that engineers can move easily between projects to put design resources where they are needed,” said Andrew Parmley, head of electronics at Thales UK’s optronics business.
Thales’ engineering and process management business maintains a range of training programmes called Workbenches. In the case of the FPGA Workbench this contains tools from Mentor Graphics, including HDL Designer, ModelSim and Precision Synthesis. An in-house user interface allows engineers to follow Thales design rules, configuration and library management conventions and other aspects of best practice and standardisation such as DO254.
Thales has a major graduate recruitment programme underway and the course will be a part of the induction process, but it is also intended as a refresher for existing Thales engineers adopting FPGA Workbench. The new course will accelerate the rollout of FPGA Workbench across Thales sites, since the Workbench methodology will be imparted at the same time as tool training.
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