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Tuesday 14 October 2008
Components
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|NewsletterAnalogue and Discretes
Audio signal processing can cut power
Monday 21 July 2008
Analogue audio signal processing is especially vulnerable to noise and this becomes an increasing challenge as more digital content at higher clock rates is added to systems-on-chip (SoCs).
Several techniques can be employed to decrease noise, from tweaking the digital design to layout isolation techniques. IP providers can also employ techniques such as frequency allocation to decrease analogue IP vulnerability, maintaining dynamic range even in very noisy digital environments.
High dynamic range is the ultimate proof that an audio IC is not “noisy”, so it is arguably the most important audio specification. The dynamic range of the standard audio CD is 96dB, considered excellent for consumer audio systems.
For pro audio applications, standalone audio ICs with dynamic range as high as 120dB are available. But this would be overkill for a consumer application where power consumption and small size are important.
Taming the Power
A key element of an audio IP offering is low power consumption, especially for portable applications that need low active power and minimal standby (leakage) power.
Reduced power consumption is also increasingly important for AC-powered consumer devices. Employing specific architectural techniques can address power issues, from output voltage stability to power source. Features, such as “headphone check,” or electric jack insertion detector, can power-down the amplifier when it is not needed. Integrating the PLL can allow audio IP to work with virtually any system clock and from the left-right signal, eliminating the high-speed master clock and further decreasing power consumption.
Shrinking Your SoC and Your BOM
While the SoC approach saves space compared with discrete ICs – or even the IC-stacking SiP approach – in the SoC itself, less space means lower manufacturing costs. Audio IP cores are available in a variety of options, with area increasing along with dynamic range/features. But today, even Hi-Fi audio IP is available with minimal power and area. A full featured Hi-Fi codec takes up a little more area, but is directly comparable in capabilities and performance with many leading ICs.
It is inefficient in cost and power to include unneeded functionality in a SoC, so it is important designers have the ability to specify precisely the functions and quality they need.
For system designers who do not need a full-codec, optimised IP for audio analogue front ends, output amplifiers, audio drivers, DACs, and ADCs can provide what is needed.
Class D Audio IP
Class-D digital audio drivers – power amplifiers – offer significant power savings over traditional class-A/B analogue amplifiers. While A/B amplifiers at best are roughly 50% efficient, class-D amplifiers achieve 85% to 95% efficiency.
For driving headphones or speakers, this represents significant power savings. Class D audio drivers were historically used in large electronic devices, but with small size, power efficiency and increasingly high-quality sound characteristics, the Class D audio architecture also offers great benefits for portable devices.
Until late 2007, class-D audio drivers required a separate IC. It is now possible to integrate class-D audio drivers into SoC designs. Power efficiency is over 85%, peaking at a remarkable 94% efficiency. And it occupies just 0.7mm2 for
stereo in 180nm.
With Class-D audio power amplifiers integrated onto the SoC, today’s system designers have audio capabilities for the creation of low-power, low-cost custom SoCs. And as an example of the final result implemented in silicon.
Joao Risques is audio product line manager at MIPS Technologies
Several techniques can be employed to decrease noise, from tweaking the digital design to layout isolation techniques. IP providers can also employ techniques such as frequency allocation to decrease analogue IP vulnerability, maintaining dynamic range even in very noisy digital environments.
High dynamic range is the ultimate proof that an audio IC is not “noisy”, so it is arguably the most important audio specification. The dynamic range of the standard audio CD is 96dB, considered excellent for consumer audio systems.
For pro audio applications, standalone audio ICs with dynamic range as high as 120dB are available. But this would be overkill for a consumer application where power consumption and small size are important.
Taming the Power
A key element of an audio IP offering is low power consumption, especially for portable applications that need low active power and minimal standby (leakage) power.
Reduced power consumption is also increasingly important for AC-powered consumer devices. Employing specific architectural techniques can address power issues, from output voltage stability to power source. Features, such as “headphone check,” or electric jack insertion detector, can power-down the amplifier when it is not needed. Integrating the PLL can allow audio IP to work with virtually any system clock and from the left-right signal, eliminating the high-speed master clock and further decreasing power consumption.
Shrinking Your SoC and Your BOM
While the SoC approach saves space compared with discrete ICs – or even the IC-stacking SiP approach – in the SoC itself, less space means lower manufacturing costs. Audio IP cores are available in a variety of options, with area increasing along with dynamic range/features. But today, even Hi-Fi audio IP is available with minimal power and area. A full featured Hi-Fi codec takes up a little more area, but is directly comparable in capabilities and performance with many leading ICs.
It is inefficient in cost and power to include unneeded functionality in a SoC, so it is important designers have the ability to specify precisely the functions and quality they need.
For system designers who do not need a full-codec, optimised IP for audio analogue front ends, output amplifiers, audio drivers, DACs, and ADCs can provide what is needed.
Class D Audio IP
Class-D digital audio drivers – power amplifiers – offer significant power savings over traditional class-A/B analogue amplifiers. While A/B amplifiers at best are roughly 50% efficient, class-D amplifiers achieve 85% to 95% efficiency.
For driving headphones or speakers, this represents significant power savings. Class D audio drivers were historically used in large electronic devices, but with small size, power efficiency and increasingly high-quality sound characteristics, the Class D audio architecture also offers great benefits for portable devices.
Until late 2007, class-D audio drivers required a separate IC. It is now possible to integrate class-D audio drivers into SoC designs. Power efficiency is over 85%, peaking at a remarkable 94% efficiency. And it occupies just 0.7mm2 for
stereo in 180nm.
With Class-D audio power amplifiers integrated onto the SoC, today’s system designers have audio capabilities for the creation of low-power, low-cost custom SoCs. And as an example of the final result implemented in silicon.
Joao Risques is audio product line manager at MIPS Technologies
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