IBM and a group of semiconductor firms - AMD, Freescale, STMicroelectronics and Toshiba - have worked with the US-based College of Nanoscale Science and Engineering (CNSE) to fabricate what they claim is the first working SRAM for the 22nm process technology.

This is purely research as 22nm semiconductor process technology is two generations away in chip manufacturing, the next generation being 32nm.

According to Dr. T.C. Chen, v-p of science and technology at IBM Research: "This new development is a critical achievement in the pursuit to continually drive miniaturization in microelectronics."

Traditionally, an SRAM chip is made more dense by shrinking its basic building block, often referred to as a cell. IBM-alliance researchers optimised the SRAM cell design to improve stability. The researchers used high-NA immersion lithography to print the aggressive pattern dimensions and densities and fabricated the parts in a 300mm semiconductor research environment.

Built at IBM's research facility in Albany, New York, the SRAM cell uses a conventional six-transistor design and has an area of 0.1 micron square.

Details of this work will be presented at the IEEE International Electron Devices (IEDM) annual technical meeting to be held in San Francisco in December.