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XJTAG has introduced a JTAG chain debugger which is designed to enable engineers using its boundary scan system to improve printed circuit board (PCB) set-up times and to troubleshoot faults on early 
prototype circuits.
The debugger will verify the integrity of the JTAG chain, and by matching JTAG device codes to their respective BSDL files, can provide information on the location of an error in the chain, such as a short or open circuit, poor joint or incorrect connection.
“This chain debugger is particularly useful for engineers bringing up JTAG for the first time on a prototype board,” said Dominic Plunkett, XJTAG's chief technology officer.
“Once the JTAG chain is working the XJTAG development system provides a rapid method for testing the rest of the board," said Plunkett.
There is also an option to print out the complete contents of the scan chain in the event of a problem, including binary and hex versions of the results.
The company’s development and run-time environments (XJDeveloper and XJRunner) are also integrated in to the tool so that a hardware engineer can develop and run code within the same environment.
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