Spiral Gateway, the Edinburgh dynamically reconfigurable processor company, is to run its next IC on a multi-project wafer (MPW) at TSMC in April.
The company's first silicon was fabbed in March 
this year. That was a test chip made by UMC containing 80 cells on a 0.18 micron process.
The new chip, to be fabbed by TSMC on a 65nm process, will contain 1,000 instruction cells containing 70 multipliers and 200 adders plus comparators and logic cells.
"The chip is for evaluation, we've got over 20 customers looking at it for imaging applications," Nazish Aslam, a development engineer on the project, told Electronics Weekly.
Aslam, 
a PhD student in her final year at Edinburgh University, won the Student of the Year award at Electronics Weekly's Elektra Awards at Electronica in Munich last week (pictured).
Spiral Gateway's Reconfigurable Instruction Cell Array (RICA) technology is particularly suitable as a vehicle for software defined radio.
For the time being, however, the technology is only being marketed to image processing customers. "We're too small a team to market it to the wireless people", said Aslam, who is currently developing the imaging software which will run on the new chip.
To get 50 working samples, which are needed, Spiral Gateway may have to pay for a couple of wafers in the MPW run.
RICA delivers the real-time performance levels of hardwired ASICs with the software programmability of a less power efficient digital signal processor.
"We've pretty much finished the major blocks and are currently doing the high level architecture and verification to make sure it all works together", said Rick Chapman, vice president for business development at Spiral Gateway.
When it's fabbed, the new RICA IC will be put onto a development board and delivered to customers. "The development board is being finalised. It will plug into a video display at the back end, and a standard CMOS sensor at the front end", said Chapman.
See also: Video - Elektra 08 Award Winners
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