FPGAs reshape embedded design

Although its use requires a significant change in design methodology, FPGA technology has become a valuable weapon in the embedded-system developer's arsenal.

To read about how the universal-submodule concept cuts I/O-design costs and time to  market, visit "Universal submodule concept cuts I/O design costs, time-to-market." 
 
As the economic slowdown takes its toll on development budgets, embedded-system designers are turning to FPGA (field-programmable-gate-array) technology to shorten design cycles, combat obsolescence, and simplify product updates.

By taking advantage of a huge and growing arsenal of FPGA-development tools, reusable-logic elements, and off-the-shelf modules, designers can craft high-performance embedded systems that you can reconfigure for changes in requirements with a minimum impact on engineering and manufacturing.

Traditionally, board designers have used these devices to interconnect system components, but the latest high-density products can also replace the processors, memory, custom logic, and many of the peripherals in a typical embedded project. Although it has the potential to transform embedded architecture, designers should analyze the performance, power, and cost limitations to determine where FPGA technology fits.

With roots in programmable-logic arrays from the 1970s, FPGA technology has developed into a thriving market with leaders Xilinx and Altera joining more specialized vendors such as Actel, Cypress, and Lattice.

Although the exact makeup is different for each FPGA vendor, the basic FPGA architecture consists of arrays of logic blocks with electrically programmable interconnections that the user or designer can configure after manufacturing. Early devices contained the equivalent of a few thousand gates, but today’s number has grown into the millions.

This interconnection flexibility allows designers to create hardware functions that exactly match the needs of a specific embedded application. In addition to the logic blocks, the latest devices embed dedicated processors within the silicon, allowing the designer to make hardware and software trade-offs to meet performance requirements.

In embedded applications in which it is a match, FPGA technology offers developers multiple advantages over discrete or custom-logic implementations.

Most experienced designers cite shorter development schedules, lower nonrecurring costs, and the ability to incorporate changes after production as their primary reasons for incorporating FPGAs. In high-performance applications, designers can create multiple parallel-computing structures that can outperform dedicated processors.

One of the often-mentioned disadvantages of FPGA technology is the additional power required compared with a general-purpose processor or custom ASIC. Similarly, because of the resistance of multiple pass transistors and connection paths, FPGA-based products are also slower than comparable conventional designs.

Although it does not take the development time of other approaches into account, the recurring cost of FPGA technology is higher than that of conventional or custom circuitry.

FPGA vendors use multiple techniques for programming the interconnections and logic blocks. For example, the antifuse-silicon structure creates a low-resistance link when you apply a high voltage across its terminals.

Advantages include low series resistance and low parasitic capacitance, but the main disadvantage is that an antifuse-based FPGA is a write-once device and therefore not reconfigurable. Static RAM cells, the most common programming technique, enable or disable pass transistors to program FPGA topology.

Although you need several transistors to implement a memory cell, SRAMs provide fast reprogrammability, and you can implement them in conventional silicon-CMOS technology. SRAM-based FPGAs also require an external boot device to set the memory on power-up. You can also use EPROM, EEPROM, and flash-memory technologies to program FPGAs, with the advantages of reprogrammability and elimination of the external boot-up device.

Manufacturers have also created multiple methods to describe and program FPGA circuitry. The most common approach is to use an HDL (hardware-description language), such as Verilog or VHDL (very-high-speed-integrated-circuit HDL), to describe the functions and topology of a design.

Once you have defined the architecture, you can use additional tools to implement the structure on a given FPGA. This process includes power and configuration optimization followed by hardware partitioning, placement, and interconnection routing. The final stage is to load the design onto the target FPGA for testing in the actual hardware environment.

As FPGA functions grow in complexity and density, designers have devised ways to exchange modular blocks of HDL code that others can incorporate into their products. These functional blocks, commonly referred to as IP (intellectual-property) cores, allow manufacturers to reuse circuit elements from previous designs or simply purchase functions from an outside source.

Examples of IP cores include UARTs, Ethernet interfaces, codecs, and microcontrollers. Manufacturers physically implement hard IP cores directly onto the silicon of a FPGA and provide soft cores as HDL code that is portable across multiple devices.

IP cores are available directly from FPGA vendors and third-party suppliers or as freely available open-source HDL code from sources such as Open Cores. Commercial IP is usually fee-based and includes documentation, verification tools, and support.

Design security and loss of IP can be a major concern for some FPGA developers. In some cases, especially those SRAM designs that store configuration data externally and transfer it to the FPGA on power-up, IP information is vulnerable.

To combat IP loss, FPGA vendors use nonvolatile programming techniques along with embedded serial numbers to trace counterfeit products. Altera offers another technique for securing a design and lowering the recurring cost of a device.

The company’s HardCopy ASIC has features equivalent to those of the corresponding Altera Stratix series FPGA and offers resources comparable to those of the FPGA but with smaller die and lower power requirements.

The final HardCopy ASIC is a pin-for-pin replacement of the FPGA prototype, allowing it to retain the system board and software between prototyping trials and the final production device. You can realize additional overall board savings by using the HardCopy ASIC for production because it requires no boot device.

All FPGA vendors offer a tool set that combines programming tools with IP verified to work with their devices. For example, the EDK (embedded development kit), Virtex-5 FX70T edition from Xilinx provides an ML507 development board, the Platform Studio embedded tool suite, and ISE (integrated software environment) supporting the PowerPC 440 hard and MicroBlaze soft processors (Figure 1).

The kit features an integrated development environment, multiple software tools, configuration wizards, and IP targeting embedded design. Users can input a circuit in the schematic editor, simulate the timing behavior of the circuit, compile it for a Virtex-5 FPGA, and test the design on the ML507 prototyping board. You can buy the Virtex-5 FX70T EDK online for $2595.

Graphical design

FPGA-development tools are also available from third-party vendors and embedded-board manufacturers. For example, National Instruments recently introduced an FPGA-based, single-board RIO (reconfigurable-I/O) module suitable for embedded applications along with an evaluation kit demonstrating programming techniques using its LabView graphical-design software.

The new modules combine a real-time embedded processor and a reconfigurable FPGA plus analog and digital I/O on a single 8.2×5.6-in. PCB (printed-circuit board). The modules feature a 266- or 400-MHz Freescale MPC5200 processor, the Wind River VxWorks real-time operating system, and a Xilinx Spartan-3 FPGA.

The onboard analog and digital I/O connects directly to the FPGA to provide low-level customization of timing and I/O signal processing. Prices for the single-board RIO devices start at $1000 (100 or more).

In support of the single-board RIO, National Instruments also introduced the embedded software-evaluation tool kit to evaluate the LabView Real-Time and LabView FPGA programming experience for embedded applications.

The kit includes extended evaluation software, an NI single-board RIO evaluation device, a daughterboard for I/O interfacing, a power supply, cables, a step-by-step tutorial, and several ready-to-run examples of common embedded tasks implemented in LabView (Figure 2).

The kit includes several exercises to create, compile, and run FPGA applications by building and fine-tuning a graphical block diagram in LabView. A 90-day version of the LabView embedded platform-evaluation kit costs $999.

A growing number of commercial-board-manufacturing companies are exploiting FPGA technology to satisfy complex design requirements and allow for future changes. For example, Quantum3D promises obsolescence-proof hardware in safety- and security-critical applications, such as primary flight instrumentation and MLS (multilevel-security) systems, with a new Sentiris AV1 PCI XMC (express mezzanine card) (Figure 3).

The vendor incorporates an FPGA-based video- and graphics-processing core instead of the traditional dedicated GPUs (graphics-processing units). Although originally designed for applications such as flight-certified image generation, Sentiris AV1 is also applicable for other uses, such as real-time imaging for medical applications.

The product’s video- and graphics-processing capabilities with analog and HD-SDI (high-definition serial-digital interface)-video outputs enable 3-D graphics in cockpits and mission-critical applications.

Sentiris AV1 offers 512 Mbytes of ECC-protected DDR2 memory, dual HD-SDI outputs, and eight lanes of PCIe (peripheral-component-interconnect express). Prices for the Sentiris AV1 start at $9980.

With its superior parallel-processing capabilities, FPGA technology makes sense for high-performance, multichannel applications, such as software radio, data acquisition, and digital-signal processing.

For example, Pentek recently introduced the Model 7151 high-resolution software-radio module for GSM (global-system-for-mobile)-communications cell-phone-monitoring and signal-intelligence applications (Figure 4). Four 200-MHz, 16-bit ADCs feed a proprietary FPGA-IP core that delivers 256 channels of DDC (digital downconversion).

You can configure each bank of 64 DDC channels for a unique output-signal bandwidth to accommodate applications requiring mixed signal types or multiple modulation schemes. You can independently source each DDC bank from any of the four ADCs, which are typically assigned to specific antennas.

The Model 7151 allows the user to simultaneously capture hundreds of signals spanning a range of modulation types, signal bandwidths, and antenna sources.

Pentek offers the ReadyFlow board-support package to provide developers with a complete library of hardware initialization, control, and application functions for Linux, Windows, or VxWorks operating systems. The Model 7151 PMC (PCI-mezzanine-card)-module version is available for $14,500.

Embedded standards

Standards organizations specializing in embedded systems are also adopting a new design specification based on FPGA hardware. For example, the recently ratified VITA (VMEbus International Trade Association) 57.1 FMC (FPGA-mezzanine-card) standard makes it easier for developers to integrate FPGAs into embedded-system designs.

The specification defines I/O devices that reside on an industry-standard mezzanine card that you attach to FPGAs that reside on a baseboard. The FPGAs directly control the devices. The FMC approach allows you to reuse a single FPGA design on multiple projects by simply replacing the I/O section. An FMC module is about half the size of a standard PMC module.

Vmetro, a Curtiss-Wright company, introduced one of the first I/O modules, basing it on the FMC standard. The ADC510, available in air- and conduction-cooled, rugged versions, integrates two 12-bit, 500-MHz ADC chips for use in digital-signal-processing applications, such as radar, signal intelligence, and electronic countermeasures.

Low-cost,commercial-off-the-shelf embedded modules are also adopting FPGA technology to give designers flexibility in custom applications. For example, the TS-7370 from Technologic Systems is a PC/104-form-factor, LCD-ready single-board computer that the company based on the Cirrus EP9302 200-MHz ARM9 CPU and a user-programmable Lattice XP2 FPGA (Figure 5).

The company designated the product LCD-ready because the FPGA connects to a dedicated RAM frame buffer, allowing users to create a custom video core on the FPGA to provide an interface to most color TFT (thin-film-transistor)-LCD panels.

Supporting multiple embedded-system applications, the TS-7370 peripheral interfaces include onboard RAM, 10/100-Mbps Ethernet, USB 2.0 host, serial ports, an SD (secure-digital)-card socket, ADC channels, digital-I/O lines, a temperature sensor, and a real-time clock. The TS-7370 runs Linux 2.6 out of the box and costs $149 (100).

As design teams adjust to reduced budgets and increased system complexity, FPGA devices and development tools have become major considerations in new embedded designs. FPGAs provide a way to create multiple system configurations with a single hardware design.

The reconfigurable devices are especially valuable in high-speed, multichannel systems with performance requirements that are difficult to meet with traditional microprocessor-based architecture.

Although the added recurring cost and power required for FPGA designs limit their application, they are a great choice for low- to medium-volume projects that will benefit from reduced risk, shorter design cycles, and minimized nonrecurring engineering.

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By Warren Webb, Technical Editor -- EDN, 3/19/2009

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