Rambus has demonstrated DRAM memory running at data rates up to
7.2Gbit/s.
The memory firm used a 1Gbit XDR DRAM device manufactured by Elpida
and an XIO memory controller.
“The XIO memory controller is up to 3.5 times more power efficient
than a GDDR5 controller, and the total memory system can provide up
to two times more bandwidth than GDDR5 at equivalent power,” said
Rambus.
In addition, the XIO memory controller demonstrated bi-modal
operation with support for both XDR DRAM as well as next-generation
XDR2 DRAM.
The aim, said the company, was to demonstrate the power efficiency
of the XDR and XDR2 memory architectures running at rates ranging
from 3.2 to 7.2Gbit/s with scalability to well over 10Gbit/s.
While this was a technical demonstrator, closer to commercial
technology
Rambus said it is licensing memory
interface technology which will extend access speeds beyond current
DDR3 data rate limits to 3.2Gbit/s.
The next generation of high speed DRAM - DDR4 - is still in the
process of being standardised by the JEDEC standards
committee.
Independently Rambus has announced the high speed capabilities of
its memory interface technology, which will effectively double the
speed of DDR3-1600 running on an 800MHz bus.
The demonstration took place at
Denali MemCon
2009 in San Jose, California.