4G mobile basestation development is the target of an analogue-FPGA design partnership between Analog Devices and Xilinx.
It is intended to be used in the design of multi-carrier GSM and multi-standard SDR (software-defined radio) basestations with the creation of FPGA-based digital pre-distortion (DPD) algorithms.
ADI has embedded transceiver components into a development platform which can be used to evaluate DPD algorithms running on Xilinx’s Virtex-6 ML605 evaluation kit.
ADI’s MS-DPD platform provides an RF and mixed-signal transmit and observation receiver chain supporting 2G, 3G and emerging 4G wireless protocols.
It allows developers to program the radio to remove non-linearities from the transmit paths and enhance radio power efficiency. The FPGA is used to implement required radio algorithms.
Xilinx’s Virtex-6 FPGA ML605 evaluation kit connects to the MS-DPD board through an industry-standard VITA-57 FMC connector.
“In collaboration with Xilinx, customers now have everything needed to demonstrate the transmit section of a basestation radio,” said Martin Cotter, segment director, Communications Infrastructure, Analog Devices.
ADI’s MS-DPD development board incorporates the recently announced AD9122 1.2-GSPS DAC (digital-to-analog converter) and ADL5375 quadrature modulator, in addition to amplifiers, mixers, clock ICs, power management ICs, and PLL (phase-locked-loop) circuits. The observation path includes the AD9230 12-bit, 250-MSPS ADC (analog-to-digital converter) to maximize the bandwidth available for DPD.