Even RFID tags could get 'true' random number generators following work at the Queen's University Belfast.
Secure communication can require a locally-generated random number in order to construct an encryption key.
"A lot of work has been done on analogue random number generation, now people have started to look at purely digital generators," researcher Dr Marie O'Neill told Electronics Weekly.
O'Neill and fellow researcher Dr Jiang Wu, both of the University's Institute of Electronics, Communications and Information Technology (ECIT) have created four simple all-digital true (as opposed to pseudo-) random number generators, three for FPGAs and one for asics.
"There are two tests for randomness: one from the early 1990s called Diehard and one from NIST, the US lab," explained O'Neill. "All of our sequences pass both tests."
For FPGAs there are three circuits based on: a single XOR gate, a single LUT (look-up table), or a multiplexer with an inverter in the feedback loop.
For asics, there is a four transistor circuit.
Fundamental to all of the ECIT generators is the effect of random noise during the transition from a metastable state to a bistable state.
For example, the XOR generator (see diagram below) has the output tied to one input, and can be held in a metastable state by holding the other input high.
When this input is taken to 0, the output will assume either of the two stable states 0 or 1.
Whether the output becomes a 0 or 1 depends on conditions, including internal noise, at the instant of input transition.
According to O'Neill, a single gate is likely to have some sort of statistical bias - producing more 0s than 1s, or vice versa.
"It is sufficient to combine 15 of the XOR generators with a tree of XOR gates to pass the tests," she said.
O'Neill pointed out that another research group also has a logic-based generator that only requires 15 sources.
However, "that design uses three inverters and three multiplexers, so it is three times the size of ours", she said.
Related work currently at ECIT includes designs for 'physical un-cloneable functions' which authenticate individual chips by extracting and identifying - but without revealing - their unique internal fingerprints.
These fingerprints can be used in a variety of security applications, said the University.
